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W185 Dataheets PDF



Part Number W185
Manufacturers Cypress Semiconductor
Logo Cypress Semiconductor
Description Six Output Peak Reducing EMI Solution
Datasheet W185 DatasheetW185 Datasheet (PDF)

W185 Six Output Peak Reducing EMI Solution Features • Cypress PREMIS™ family offering • Generates an EMI optimized clocking signal at the output • Selectable output frequency range • Six 1.25%, 3.75%, or 0% down or center spread outputs • One non-Spread output of Reference input • Integrated loop filter components • Operates with a 3.3V or 5V supply • Low power CMOS design • Available in 24-pin SSOP (Shrink Small Outline Package) • Outputs may be selectively disabled Table 1. Modulation Width S.

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W185 Six Output Peak Reducing EMI Solution Features • Cypress PREMIS™ family offering • Generates an EMI optimized clocking signal at the output • Selectable output frequency range • Six 1.25%, 3.75%, or 0% down or center spread outputs • One non-Spread output of Reference input • Integrated loop filter components • Operates with a 3.3V or 5V supply • Low power CMOS design • Available in 24-pin SSOP (Shrink Small Outline Package) • Outputs may be selectively disabled Table 1. Modulation Width Selection SS% 0 1 W185 Output Fin ≥ Fout ≥ Fin – 1.25% Fin ≥ Fout ≥ Fin – 3.75% W185-5 Output Fin + 0.625% ≥ Fin≥ – 0.625% Fin + 1.875% ≥ Fin≥ –1.875% Table 2. Frequency Range Selection FS2 0 0 1 FS1 0 1 0 1 Frequency Range 28 MHz ≤ FIN ≤ 38 MHz 38 MHz ≤ FIN ≤ 48 MHz 46 MHz ≤ FIN ≤ 60 MHz 58 MHz ≤ FIN ≤ 75 MHz Key Specifications Supply Voltages: ........................................... VDD = 3.3V±5% or VDD = 5V±10% Frequency Range: ............................ 28 MHz ≤ Fin ≤ 75 MHz Crystal Reference Range:................. 28 MHz ≤ Fin ≤ 40 MHz Cycle to Cycle Jitter: ....................................... 300 ps (max.) Selectable Spread Percentage: ....................1.25% or 3.75% Output Duty Cycle: ............................... 40/60% (worst case) Output Rise and Fall Time: .................................. 5 ns (max.) 1 Table 3. Output Enable EN1 0 0 1 1 EN2 0 1 0 1 Low Low Active Active CLK0:4 Low Active Low Active CLK5 Simplified Block Diagram 3.3V or 5.0V Pin Configuration SSOP X1 XTAL Input 40MHz max. X2 W185 Spread Spectrum Output (EMI suppressed) REFOUT FS2 X1 X2 GND SS% EN2 GND CLK0 VDD CLK1 CLK2 1 2 3 4 5 6 24 23 22 21 20 19 18 17 16 15 14 13 SSON# RESET FS1 VDD VDD NC EN1 CLK5 VDD CLK4 GND CLK3 W185/W185-5 7 8 9 3.3V or 5.0V 10 11 12 Oscillator or Reference Input W185 Spread Spectrum Output (EMI suppressed) PREMIS is a trademark of Cypress Semiconductor Corporation. Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600 July 25, 2000, rev. *A W185 Pin Definitions Pin Name CLK0:5 CLKIN or X1 Pin No. 9, 11, 12, 13, 15, 17 3 Pin Type O I Pin Description Modulated Frequency Outputs: Frequency modulated copies of the unmodulated input clock (SSON# asserted). Crystal Connection or External Reference Frequency Input: This pin has dual functions. It may either be connected to an external crystal, or to an external reference clock. Crystal Connection: If using an external reference, this pin must be left unconnected. Modulation Width Selection: When Spread Spectrum feature is turned on, this pin is used to select the amount of variation and peak EMI reduction that is desired on the output signal. This pin has an internal pull-up resistor. Modulation Profile Restart: A rising edge on this input restarts the modulation pattern at the beginning of its defined path. This pin has an internal pull-down resistor. Non-Modulated Output: This pin provides a copy of the reference fre.


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