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W183 Dataheets PDF



Part Number W183
Manufacturers Cypress Semiconductor
Logo Cypress Semiconductor
Description Full Feature Peak Reducing EMI Solution
Datasheet W183 DatasheetW183 Datasheet (PDF)

W183 Full Feature Peak Reducing EMI Solution Features • Cypress PREMIS™ family offering • Generates an EMI optimized clocking signal at the output • Selectable output frequency range • Single 1.25%, 3.75% down or center spread output • Integrated loop filter components • Operates with a 3.3 or 5V supply • Low power CMOS design • Available in 14-pin SOIC (Small Outline Integrated Circuit) Table 1. Modulation Width Selection SS% 0 1 W183 Output Fin ≥ Fout ≥ Fin – 1.25% Fin ≥ Fout ≥ Fin – 3.75% W1.

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W183 Full Feature Peak Reducing EMI Solution Features • Cypress PREMIS™ family offering • Generates an EMI optimized clocking signal at the output • Selectable output frequency range • Single 1.25%, 3.75% down or center spread output • Integrated loop filter components • Operates with a 3.3 or 5V supply • Low power CMOS design • Available in 14-pin SOIC (Small Outline Integrated Circuit) Table 1. Modulation Width Selection SS% 0 1 W183 Output Fin ≥ Fout ≥ Fin – 1.25% Fin ≥ Fout ≥ Fin – 3.75% W183-5 Output Fin + 0.625% ≥ Fin≥ – 0.625% Fin + 1.875% ≥ Fin≥ –1.875% Table 2. Frequency Range Selection FS2 0 0 1 1 FS1 0 1 0 1 Frequency Range 28 MHz ≤ FIN ≤ 38 MHz 38 MHz ≤ FIN ≤ 48 MHz 46 MHz ≤ FIN ≤ 60 MHz 58 MHz ≤ FIN ≤ 75 MHz Key Specifications Supply Voltages: ........................................... VDD = 3.3V±5% or VDD = 5V±10% Frequency Range: ............................ 28 MHz ≤ Fin ≤ 75 MHz Crystal Reference Range:................. 28 MHz ≤ Fin ≤ 40 MHz Cycle to Cycle Jitter: ....................................... 300 ps (max.) Selectable Spread Percentage: ....................1.25% or 3.75% Output Duty Cycle: ............................... 40/60% (worst case) Output Rise and Fall Time: .................................. 5 ns (max.) Simplified Block Diagram 3.3V or 5.0V Pin Configuration SOIC FS2 CLKIN or X1 NC or X2 GND GND SS% FS1 1 2 3 4 5 6 14 13 12 11 10 9 8 REFOUT OE# SSON# Reset VDD VDD CLKOUT W183/W183-5 X1 XTAL Input X2 40 MHz Max W183 Spread Spectrum Output (EMI suppressed) 7 3.3V or 5.0V Oscillator or Reference Input W183 Spread Spectrum Output (EMI suppressed) PREMIS is a trademark of Cypress Semiconductor Corporation. Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600 July 25, 2000, rev.*B W183 Pin Definitions Pin Name CLKOUT REFOUT Pin No. 8 14 Pin Type O O Pin Description Output Modulated Frequency: Frequency modulated copy of the input clock (SSON# asserted). Non-Modulated Output: This pin provides a copy of the reference frequency. This output will not have the Spread Spectrum feature regardless of the state of logic input SSON#. Crystal Connection or External Reference Frequency Input: This pin has dual functions. It may either be connected to an external crystal, or to an external reference clock. Crystal Connection: Input connection for an external crystal. If using an external reference, this pin must be left unconnected. Spread Spectrum Control (Active LOW): Asserting this signal (active LOW) turns the internal modulation waveform on. This pin has an internal pull-down resistor. Modulation Width Selection: When Spread Spectrum feature is turned on, this pin is used to select the amount of variation and peak EMI reduction that is desired on the output signal. This pin has an internal pull-up resistor. Output Enable (Active LOW): When this pin is held HIGH, the output buffers are placed in a high-impedance mode. This pin has an internal pull-down resistor. Modulation Profile Restart: A rising edge on this input restarts the modulation pattern at the beginning of its defined path. This pin has an internal pull-down resistor. Frequency Selection Bits: These pins select the frequency range of operation. Refer to Table 2. These pins have internal pull-up resistors. Power Connection: Connected to 3.3V or 5V power supply. Ground Connection: Connect all ground pins to the common ground plane. CLKIN or X1 2 I NC or X2 SSON# 3 12 I I SS% 6 I OE# 13 I Reset 11 I FS1:2 VDD GND 7, 1 9, 10 4, 5 I P G 2 W183 Overview The W183 product is one of a series of devices in the Cypress PREMIS family. The PREMIS family incorporates the latest advances in PLL spread spectrum frequency synthesizer techniques. By frequency modulating the output with a low frequency carrier, peak EMI is greatly reduced. Use of this technology allows systems to pass increasingly difficult EMI testing without resorting to costly shielding or redesign. In a system, not only is EMI reduced in the various clock lines, but also in all signals which are synchronized to the clock. Therefore, the benefits of using this technology increase with the number of address and data lines in the system. The Simplified Block Diagram shows a simple implementation. times the reference frequency. (Note: For the W183 the output frequency is equal to the input frequency.) The unique feature of the Spread Spectrum Frequency Timing Generator is that a modulating waveform is superimposed at the input to the VCO. This causes the VCO output to be slowly swept across a predetermined frequency band. Because the modulating frequency is typically 1000 times slower than the fundamental clock, the spread spectrum process has little impact on system performance. Frequency Selection With SSFTG In Spread Spectrum Frequency Timing Generation, EMI reduction depends on the shape, modulation percentage, and frequency of the modulating waveform. While the shape and frequency .


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