DATA SHEET
BIPOLAR ANALOG INTEGRATED CIRCUIT
µPC4093
J-FET INPUT LOW-OFFSET OPERATIONAL AMPLIFIER
The µPC4093 operat...
DATA SHEET
BIPOLAR ANALOG INTEGRATED CIRCUIT
µPC4093
J-FET INPUT LOW-OFFSET OPERATIONAL AMPLIFIER
The µPC4093 operational amplifier is a high-speed version of the µPC4091. NEC's unique high-speed
PNP transistor (fT = 300 MHz) in the output stage realizes a high slew rate of 25 V/µs under voltage-follower conditions without an oscillation problem. Zener-zap resistor trimming in the input stage produces excellent offset voltage and temperature drift characteristics. With AC performance characteristics that are two times better than conventional bi-FET operation amplifiers, the
µPC4093 is ideal for fast integrators, active filters, and other high-speed circuit applications.
FEATURES
Stable operation with 220 pF capacitive load Low input offset voltage and offset voltage null capability ±2.5 mV (MAX.) ±7 µV/°C (TYP.) temperature drift Very low input bias and offset currents Low noise : en = 19 nV/ √Hz (TYP.) Output short circuit protection High input impedance ... J-FET Input Stage Internal frequency compensation High slew rate: 25 V/µs (TYP.)
ORDERING INFORMATION
Part Number Package 8-pin plastic DIP (300 mil) 8-pin plastic SOP (225 mil)
µPC4093C µPC4093G2
EQUIVALENT CIRCUIT
V+ (7) Q9 (2) II Q1 IN (3) Q5 (1) OFFSET NULL Q3 Q4 (5) OFFSET NULL Q2 C1 D1 Q10 Q7 (6) HIGH SPEED
PNP Q6 OUT
PIN CONFIGURATION (Top View)
µ PC4093C, 4093G2
OFFSET 1 NULL II 2 − + 8 NC
7 V+
IN V−
3
6 OUT OFFSET NULL
4
5
Q8 (4)
Remark NC : No Connection
V–
TRIMMED
The infor...