Document
Standard ICs
Dual 4-bit static shift register
BU4015B / BU4015BF
The BU4015B and BU4015BF are 4-stage static shift registers, each consisting of two circuits. The D flip-flops for each stage share a common reset input, enabling external asynchronous reset at any point. Also, the flip-flops at each stage are triggered by the rising edge of the clock input. “H” level reset input resets the contents of all stages to “L”, regardless of the clock and data input, and sets data outputs Q0 to Q3 to “L”.
Features • 1) Low power dissipation. 2) Wide range of operating power supply voltages. 3) High input impedance.
4) High fan-out. 5) Direct drive of 2 L-TTL inputs and 1 LS-TTL input.
•Block diagram
CLOCK B Q3B 1 16 VDD 2 CL Q2B 3 R D 14 RESET B Q0B 15 DB
•Logic circuit diagram
Q0 Q1 Q2 Q3 D
D Q D Q D Q D Q CLR Q CLR Q CLR Q CLR Q
CLOCK
Q3 Q2 Q1 Q0
Q1A
4
13
RESET
Q0A RESET A DA
5 Q 0 Q1 Q2 Q3 6 CL R D
12
Q1B Q2B
11
7
10
Q3A CLOCK A
VSS
8
9
•Truth table
CLOCK D L H X X
X : Irrelevant
RESET L L L H
Q0 L H
Q1 Q0 Q0
Q2 Q1 Q1
Q3 Q2 Q2
No Change L L L L
X
1
Standard ICs
BU4015B / BU4015BF
= 0V, Ta = 25°C)
Symbol VDD Pd Topr Tstg VIN Limits – 0.3 ~ + 18 1000 (DIP), 500 (SOP) – 40 ~ + 85 – 55 ~ + 150 – 0.3 ~ VDD + 0.3 Unit V mW °C °C V
•Absolute maximum ratings (V
Parameter Power supply voltage Power dissipation Operating temperature Storage temperature Input voltage
SS
Electrical characteristics • DC characteristics (unless otherwise noted, Ta = 25°C, V
Parameter Symbol Min. 3.5 Input high level voltage VIH 7.0 11.0 — Input low level voltage VIL — — Input high level current Input low level current IIH IIL — — 4.95 Output high level voltage VOH 9.95 14.95 — Output low level voltage VOL — — – 0.16 Output high level current IOH – 0.4 – 1.2 0.44 Output low level current IOL 1.1 3.0 — Static current dissipation IDD — — Typ. — — — — — — — — — — — — — — — — — — — — — — —
SS
= 0V)
Max. — — — 1.5 3.0 4.0 0.3 µA µA V V Unit Conditions
VDD (V) 5 10 15 5 10 15 15 15 5
—
—
VIH = 15V VIL = 0V
– 0.3 — — — 0.05 0.05 0.05 — — — — — — 20 40 80
V
10 15 5
IO = 0mA
V
10 15 5
IO = 0mA
VOH = 4.6V VOH = 9.5V VOH = 13.5V VOL = 0.4V VOL = 0.5V VOL = 1.5V
mA
10 15 5
mA
10 15 5
µA
10 15
VI = VDD or GND
2
Standard ICs
Switching characteristics (unless otherwise noted, Ta = 25°C, VSS = 0V, CL = 50pF)
Parameter Symbol Min. — Output rise time tTLH — — — Output fall time tTHL — — — Propagation delay time, CLOCK, D→Q tPLH tPHL — — — Propagation delay time, RESET to Q tPLH tPHL — — — Setup time tsu — — — Minimum clock pulse width tWH (CLK) — — — Minimum reset pulse width tWH (R) — — — Maximum clock frequency f (CLK) Max. — — — Maximum clock rise time and fall time Input capacitance tr (CLK) tf (CLK) CIN — — — Typ. 180 90 65 100 50 40 310 125 90 460 180 120 100 50 40 185 85 55 200 80 60 20 6.0 7.5 100 40 15 5 Max. — — — — — — — — — — — — — — — — — — — — — — — — — — — — pF µs MHz ns ns ns ns ns ns ns Unit
BU4015B / BU4015BF
VDD (V) 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 —
Conditions
—
—
—
—
—
—
—
—
—
—
3
Standard ICs
BU4015B / BU4015BF
•Measurement circuits
VDD D tSU P. G. 2 D Q0 Q1 Q2 P. G. 1 CL R Q3 VSS CL CL CL CL RESET GND Q0 tTLH CLOCK tWH tPLH
90%
20ns
20ns
tSU 20ns
20ns
tWH tPHL
50% 10%
tPHL
50%
tTHL
20ns
10% 90% 50%
20ns
10%
tWH (R)
Fig.1 Switching characteristics measurement circuit
Fig.2 Switching time measurement waveform
•Electrical characterisistic curve
1200 POWER DISSIPATION : Pd (mW) DIP16 1000 800
600
SOP16
400
200 0
0
25
50
75
100
125
150
AMBIENT TEMPERATURE : Ta (°C)
Fig.3 Power dissipation vs. ambient temperature
•External dimensions (Units: mm)
BU4015B BU4015BF
10.0 ± 0.2
19.4 ± 0.3 16 9 6.5 ± 0.3
16 6.2 ± 0.3 4.4 ± 0.2
9
7.62
3.2 ± 0.2 4.25 ± 0.3
1 1.5 ± 0.1
8
0.11
0.3 ± 0.1
2.54
0.5 ± 0.1
1.27
0.4 ± 0.1
0.3Min. 0.15
0° ~ 15°
DIP16
SOP16
4
0.15 ± 0.1
1 0.51Min.
8
.