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PUMD6 Dataheets PDF



Part Number PUMD6
Manufacturers NXP
Logo NXP
Description NPN/PNP resistor-equipped transistor
Datasheet PUMD6 DatasheetPUMD6 Datasheet (PDF)

DISCRETE SEMICONDUCTORS DATA SHEET ndbook, halfpage MBD128 PUMD6 NPN/PNP resistor-equipped transistor Product specification Supersedes data of 1997 Dec 15 1999 May 28 Philips Semiconductors Product specification NPN/PNP resistor-equipped transistor FEATURES • Transistors with different polarity, each with a built-in bias resistor R1 (typ. 4.7 kΩ) • No mutual interference between the transistors • Simplification of circuit design • Reduces number of components and board space. TR1 PUMD6 han.

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DISCRETE SEMICONDUCTORS DATA SHEET ndbook, halfpage MBD128 PUMD6 NPN/PNP resistor-equipped transistor Product specification Supersedes data of 1997 Dec 15 1999 May 28 Philips Semiconductors Product specification NPN/PNP resistor-equipped transistor FEATURES • Transistors with different polarity, each with a built-in bias resistor R1 (typ. 4.7 kΩ) • No mutual interference between the transistors • Simplification of circuit design • Reduces number of components and board space. TR1 PUMD6 handbook, halfpage 6 5 4 R1 5 4 6 TR2 R1 APPLICATIONS • Especially suitable for space reduction in interface and driver circuits • Inverter circuit configurations without use of external resistors. DESCRIPTION NPN/PNP resistor-equipped transistors in an SC-88 (SOT363) plastic package. PINNING PIN 1, 4 2, 5 6, 3 MARKING TYPE NUMBER PUMD6 MARKING CODE Dt6 emitter base collector DESCRIPTION TR1; TR2 TR1; TR2 TR1; TR2 1 Top view 2 3 MAM381 1 2 3 Fig.1 Simplified outline (SC-88; SOT363) and symbol. 1 2 MGA893 - 1 3 Fig.2 Equivalent inverter symbol. 1999 May 28 2 Philips Semiconductors Product specification NPN/PNP resistor-equipped transistor LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL PARAMETER CONDITIONS − − − − − − − Tamb ≤ 25 °C; note 1 − −65 − −65 Tamb ≤ 25 °C − MIN. PUMD6 MAX. UNIT Per transistor; for the PNP transistor with negative polarity VCBO VCEO VEBO VI collector-base voltage collector-emitter voltage emitter-base voltage input voltage positive negative IO ICM Ptot Tstg Tj Tamb Per device Ptot Note 1. Transistor mounted on an FR4 printed-circuit board. total power dissipation 300 mW output current (DC) peak collector current total power dissipation storage temperature junction temperature operating ambient temperature +40 −10 100 100 200 +150 150 +150 V V mA mA mW °C °C °C open emitter open base open collector 50 50 10 V V V 1999 May 28 3 Philips Semiconductors Product specification NPN/PNP resistor-equipped transistor THERMAL CHARACTERISTICS SYMBOL Rth j-a Note 1. Transistor mounted on an FR4 printed-circuit board. CHARACTERISTICS Tamb = 25 °C unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. − − − − 200 − 3.3 − TYP. − − − − − − 4.7 − − PARAMETER thermal resistance from junction to ambient CONDITIONS note 1 VALUE 416 PUMD6 UNIT K/W MAX. UNIT Per transistor; for the PNP transistor with negative polarity ICBO ICEO IEBO hFE VCEsat R1 collector cut-off current collector cut-off current emitter cut-off current DC current gain input resistor IE = 0; VCB = 50 V IB = 0; VCE = 30 V IB = 0; VCE = 30 V; Tj = 150 °C IC = 0; VEB = 5 V IC = 1 mA; VCE = 5 V 100 1 50 100 − 100 6.1 mV kΩ nA µA µA nA collector-emitter saturation voltage IC = 5 mA; IB = 0.25 mA NPN transistor Cc Cc collector capacitance IE = ie = 0; VCB = 10 V; f = 1 MHz 2.5 pF PNP transistor collector capacitance IE = ie = 0; VCB = −10 V; f = 1 MHz − 3 pF 1999 May 28 4 Philips Semiconductors Product specification NPN/PNP resistor-equipped transistor PUMD6 103 handbook, halfpage MGS329 103 MGS330 hFE VCEsat (1) (V) (2) 102 (3) (1) (2) (3) 102 10−1 TR1 (NPN); VCE = 5 V. (1) Tamb = 100 °C. (2) Tamb = 25 °C. (3) Tamb = −40 °C. 1 10 IC (mA) 102 10 10−1 TR1 (NPN); IC/IB = 20. (1) Tamb = 100 °C. (2) Tamb = 25 °C. (3) Tamb = −40 °C. 1 10 IC (mA) 102 Fig.3 DC current gain as a function of collector current; typical values. Fig.4 Collector-emitter saturation voltage as a function of collector current; typical values. 103 handbook, halfpage MGS331 103 MGS330 (1) hFE VCEsat (V) (2) (3) 102 102 (1) (2) (3) 10 10−1 TR2 (PNP); VCE = −5 V. (1) Tamb = 100 °C. (2) Tamb = 25 °C. (3) Tamb = −40 °C. 1 10 IC (mA) 102 10 10−1 TR2 (PNP); IC/IB = 20. (1) Tamb = 100 °C. (2) Tamb = 25 °C. (3) Tamb = −40 °C. 1 10 IC (mA) 102 Fig.5 DC current gain as a function of collector current; typical values. Fig.6 Collector-emitter saturation voltage as a function of collector current; typical values. 1999 May 28 5 Philips Semiconductors Product specification NPN/PNP resistor-equipped transistor PACKAGE OUTLINE Plastic surface mounted package; 6 leads PUMD6 SOT363 D B E A X y HE v M A 6 5 4 Q pin 1 index A A1 1 e1 e 2 bp 3 w M B detail X Lp c 0 1 scale 2 mm DIMENSIONS (mm are the original dimensions) UNIT mm A 1.1 0.8 A1 max 0.1 bp 0.30 0.20 c 0.25 0.10 D 2.2 1.8 E 1.35 1.15 e 1.3 e1 0.65 HE 2.2 2.0 Lp 0.45 0.15 Q 0.25 0.15 v 0.2 w 0.2 y 0.1 OUTLINE VERSION SOT363 REFERENCES IEC JEDEC EIAJ SC-88 EUROPEAN PROJECTION ISSUE DATE 97-02-28 1999 May 28 6 Philips Semiconductors Product specification NPN/PNP resistor-equipped transistor DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values PUMD6 This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sh.


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