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SL74HC4053 Dataheets PDF



Part Number SL74HC4053
Manufacturers System Logic Semiconductor
Logo System Logic Semiconductor
Description Analog Multiplexer/Demultiplexer
Datasheet SL74HC4053 DatasheetSL74HC4053 Datasheet (PDF)

SL74HC4053 Analog Multiplexer/Demultiplexer High-Performance Silicon-Gate CMOS The SL74HC4053 utilize silicon-gate CMOS technology to achieve fast propagation delays, low ON resistances, and low OFF leakage currents. These analog multiplexers/demultiplexers control analog voltages that may vary across the complete power supply range (from VCC to VEE). The Channel-Select inputs determine which one of the Analog Inputs/Outputs is to be connected, by means of an analog switch, to the Common Output.

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SL74HC4053 Analog Multiplexer/Demultiplexer High-Performance Silicon-Gate CMOS The SL74HC4053 utilize silicon-gate CMOS technology to achieve fast propagation delays, low ON resistances, and low OFF leakage currents. These analog multiplexers/demultiplexers control analog voltages that may vary across the complete power supply range (from VCC to VEE). The Channel-Select inputs determine which one of the Analog Inputs/Outputs is to be connected, by means of an analog switch, to the Common Output/Input.When the Enable pin is high, all analog switches are turned off. The Channel-Select and Enable inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. • Fast Switching and Propagation Speeds • Low Crosstalk Between Switches • Diode Protection on All Inputs/Outputs • Analog Power Supply Range (VCC-VEE)=2.0 to 12.0 V • Digital (Control) Power Supply Range (VCC-GND)=2.0 to 6.0 V • Low Noise ORDERING INFORMATION SL74HC4053N Plastic SL74HC4053D SOIC TA = -55° to 125° C for all packages PIN ASSIGNMENT LOGIC DIAGRAM Triple Single-Pole, Double-Position Plus Common Off FUNCTION TABLE Control Inputs Enable C L L L L PIN 16 =VCC PIN 7 = VEE PIN 8 = GND L L L L H L L L L H H H H X Select B L L H H L L H H X A L H L H L H L H X Z0 Z0 Z0 Z0 Z1 Z1 Z1 Z1 Y0 Y0 Y1 Y1 Y0 Y0 Y1 Y1 None X0 X1 X0 X1 X0 X1 X0 X1 ON Channels X = don’t care SLS System Logic Semiconductor SL74HC4053 MAXIMUM RATINGS * Symbol VCC VEE VIS VIN I PD Tstg TL * Parameter Positive DC Supply Voltage (Referenced to GND) (Referenced to VEE) Negative DC Supply Voltage (Referenced to GND) Analog Input Voltage Digital Input Voltage (Referenced to GND) DC Input Current Into or Out of Any Pin Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ Storage Temperature Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package) Value -0.5 to +7.0 -0.5 to +14.0 -7.0 to +0.5 VEE - 0.5 to VCC+0.5 -1.5 to VCC +1.5 ±25 750 500 -65 to +150 260 Unit V V V V mA mW °C °C Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. +Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C SOIC Package: : - 7 mW/°C from 65° to 125°C RECOMMENDED OPERATING CONDITIONS Symbol VCC VEE VIS VIN VIO * Parameter Positive Supply Voltage (Referenced to GND) (Referenced to VEE) Negative DC Supply Voltage (Referenced to GND) Analog Input Voltage Digital Input Voltage (Referenced to GND) Static or Dynamic Voltage Across Switch Operating Temperature, All Package Types Input Rise and Fall Time (Channel Select or Enable Inputs) VCC =2.0 V VCC =4.5 V VCC =6.0 V Min 2.0 2.0 - 6.0 VEE GND -55 0 0 0 Max 6.0 12.0 GND VCC VCC 1.2 +125 1000 500 400 Unit V V V V V °C ns TA tr, t f * For voltage drops across the switch greater than 1.2 V (switch on), excessive V CC current may be drawn; i. e., the current out of the switch may contain both VCC and switch input components. The reliability of the device will be unaffected unless the Maximum Ratings are exceeded. This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range indicated in the Recommended Operating Conditions.. Unused digital input pins must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused Analog I/O pins may be left open or terminated. SLS System Logic Semiconductor SL74HC4053 DC ELECTRICAL CHARACTERISTICS Digital Section (Voltages Referenced to GND) VEE=GND, Except Where Noted VCC Symbol VIH Parameter Minimum High-Level Input Voltage, ChannelSelect or Enable Inputs Maximum Low -Level Input Voltage, ChannelSelect or Enable Inputs Maximum Input Leakage Current, Channel-Select or Enable Inputs Maximum Quiescent Supply Current (per Package) Test Conditions RON = Per Spec V 2.0 4.5 6.0 2.0 4.5 6.0 6.0 Guaranteed Limit 25 °C to -55°C 1.5 3.15 4.2 0.3 0.9 1.2 ±0.1 ≤85 °C 1.5 3.15 4.2 0.3 0.9 1.2 ±1.0 ≤125 °C 1.5 3.15 4.2 0.3 0.9 1.2 ±1.0 Unit V VIL RON = Per Spec V IIN VIN=VCC or GND, VEE=-6.0 V µA ICC Channel Select = VCC or GND Enable = VCC or GND VIS = VCC or GND VIO= 0 V VEE = GND VEE = -6.0 µA 6.0 6.0 2 8 20 80 40 160 DC ELECTRICAL CHARACTERISTICS Analog Section VCC Symbol Parameter Test Conditions V VEE V Guaranteed Limit 25 °C to -55°C 190 120 100 150 100 80 30 12 10 0.1 ≤85 °C 240 150 125 190 125 100 35 15 12 0.5 ≤125 °C 280 170 140 230 140 115 40 18 14 1.0 Ω Unit RON Maximum “ON” Resistance VIN=VIL or VIH VIS = VCC or VEE IS ≤ 2.0 mA(Figure 1) VIN=VIL or VIH VIS = VCC or VEE (Endpoints) IS ≤ 2.0 mA(Figure 1) 4.5 4.5 6.0 4.5 4.5 6.0 4.5 4.5 6.0 6.0 0.0 -4.5 -6.0 0.0 -4.5 -6.0 0.0 -4.5 -6.0 -6.0 Ω ∆RON Maximum Difference in “ON.


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