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SL74HC112

Part Number	SL74HC112
Manufacturer	System Logic Semiconductor
Description	Dual J-K Flip-Flop with Set and Reset
Published	Apr 16, 2005
Detailed Description	SL74HC112 Dual J-K Flip-Flop with Set and Reset High-Performance Silicon-Gate CMOS The SL74HC112 is identical in pinout...
Datasheet	SL74HC112 PDF File

Overview

SL74HC112 Dual J-K Flip-Flop with Set and Reset High-Performance Silicon-Gate CMOS The SL74HC112 is identical in pinout to the LS/ALS112.
The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs.
Each flip-flop is negative-edge clocked and has active-low asynchronous Set and Reset inputs.
• Outputs Directly Interface to CMOS, NMOS, and TTL • Operating Voltage Range: 2.
0 to 6.
0 V • Low Input Current: 1.
0 µA • High Noise Immunity Characteristic of CMOS Devices ORDERING INFORMATION SL74HC112N Plastic SL74HC112D SOIC TA = -55° to 125° C for all packages PIN ASSIGNMENT LOGIC DIAGRAM FUNCTION TABLE Inputs Set L H L H H H H ...

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