SN54/74LS375 4-BIT D LATCH
The SN54/ 74LS375 is a 4-Bit D-Type Latch for use as temporary storage for binary information...
SN54/74LS375 4-BIT D LATCH
The SN54/ 74LS375 is a 4-Bit D-Type Latch for use as temporary storage for binary information between processing limits and input /output or indicator units. When the Enable (E) is HIGH, information present at the D input will be transferred to the Q output and, if E is HIGH, the Q output will follow the input. When E goes LOW, the information present at the D input prior to its setup time will be retained at the Q outputs.
4-BIT D LATCH
LOW POWER
SCHOTTKY
CONNECTION DIAGRAM DIP (TOP VIEW)
V CC 16 D 3 15 Q 3 14 Q 3 13 E 2,3 12 Q 2 11 Q 2 10 D 2 9
NOTE: The Flatpak version has the same pinouts (Connection Diagram) as the Dual In-Line Package.
J SUFFIX CERAMIC CASE 620-09
16 1
1 D 0
2 Q 0
3 Q 0
4 E 0,1
5 Q 1
6 Q 1
7 D 1
8 GND
16
N SUFFIX PLASTIC CASE 648-08
1
TRUTH TABLE (Each latch)
tn D H L PIN NAMES tn+1 Q H L
NOTES: tn = bit time before enable negative-going transition. tn+1 = bit time after enable negative-going transition.
16 1
D SUFFIX SOIC CASE 751B-03
LOADING (Note a) HIGH LOW 0.25 U.L. 1.0 U.L. 1.0 U.L. 5 (2.5) U.L. 5 (2.5) U.L.
ORDERING INFORMATION
SN54LSXXXJ SN74LSXXXN SN74LSXXXD Ceramic Plastic SOIC
D1 – D4 E0 – 1 E2 – 3 Q1 – Q4 Q1 – Q4
Data Inputs Enable Input Latches 0, 1 Enable Input Latches 2, 3 Latch Outputs (Note b) Complimentary Latch Outputs (Note b)
0.5 U.L. 2.0 U.L. 2.0 U.L. 10 U.L. 10 U.L.
NOTES: a) 1 TTL Unit Load (U.L.) = 40 µA HIGH/1.6 mA LOW. b) The Output LOW drive factor is 25 U.L. for Military (54...
