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P87C38X2 Dataheets PDF



Part Number P87C38X2
Manufacturers NXP
Logo NXP
Description 80C51 8-bit microcontroller family 4K/8K/16K/32K ROM/OTP 128B/256B RAM low voltage 2.7 to 5.5 V/ low power/ high speed 30/33 MHz
Datasheet P87C38X2 DatasheetP87C38X2 Datasheet (PDF)

INTEGRATED CIRCUITS 80C31X2/32X2 80C51X2/52X2/54X2/58X2 87C51X2/52X2/54X2/58X2 80C51 8-bit microcontroller family 4K/8K/16K/32K ROM/OTP 128B/256B RAM low voltage (2.7 to 5.5 V), low power, high speed (30/33 MHz) Preliminary data 2001 Sep 24 Philips Semiconductors Philips Semiconductors Preliminary data 80C51 8-bit microcontroller family 4K/8K/16K/32K ROM/OTP, low voltage (2.7 to 5.5 V), low power, high speed (30/33 MHz) 80C3xX2; 80C5xX2; 87C5xX2 DESCRIPTION The Philips microcontrollers de.

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INTEGRATED CIRCUITS 80C31X2/32X2 80C51X2/52X2/54X2/58X2 87C51X2/52X2/54X2/58X2 80C51 8-bit microcontroller family 4K/8K/16K/32K ROM/OTP 128B/256B RAM low voltage (2.7 to 5.5 V), low power, high speed (30/33 MHz) Preliminary data 2001 Sep 24 Philips Semiconductors Philips Semiconductors Preliminary data 80C51 8-bit microcontroller family 4K/8K/16K/32K ROM/OTP, low voltage (2.7 to 5.5 V), low power, high speed (30/33 MHz) 80C3xX2; 80C5xX2; 87C5xX2 DESCRIPTION The Philips microcontrollers described in this data sheet are high-performance static 80C51 designs incorporating Philips’ high-density CMOS technology with operation from 2.7 V to 5.5 V. They support both 6-clock and 12-clock operation. The 8xC31X2/51X2 and 8xC32X2/52X2/54X2/58X2 contain 128 byte RAM and 256 byte RAM respectively, 32 I/O lines, three 16-bit counter/timers, a six-source, four-priority level nested interrupt structure, a serial I/O port for either multi-processor communications, I/O expansion or full duplex UART, and on-chip oscillator and clock circuits. In addition, the devices are low power static designs which offer a wide range of operating frequencies down to zero. Two software Type Memory # of Timers selectable modes of power reduction — idle mode and power-down mode — are available. The idle mode freezes the CPU while allowing the RAM, timers, serial port, and interrupt system to continue functioning. The power-down mode saves the RAM contents but freezes the oscillator, causing all other chip functions to be inoperative. Since the design is static, the clock can be stopped without loss of user data. Then the execution can be resumed from the point the clock was stopped. SELECTION TABLE For applications requiring more ROM and RAM, as well as more on-chip peripherals, see the P89C66x and P89C51Rx2 data sheets. Timers Serial Interfaces Default Clock Rate ADC bits/ch. Optional Clock Rate Max. Freq. at 6-clk / 12-clk (MHz) 30/33 30/33 30/33 30/33 30/33 30/33 30/33 30/33 30/33 30/33 Freq. Range at 3V (MHz) 0–16 0–16 0–16 0–16 0–16 0–16 0–16 0–16 0–16 0–16 Freq. Range at 5V (MHz) 0–30/33 0–30/33 0–30/33 0–30/33 0–30/33 0–30/33 0–30/33 0–30/33 0–30/33 0–30/33 Interrupts (External) 6 (2) 6 (2) 6 (2) 6 (2) 6 (2) 6 (2) 6 (2) 6 (2) 6 (2) 6 (2) P87C58X2 P80C58X2 P87C54X2 P80C54X2 P87C52X2 P80C52X2 P87C51X2 P80C51X2 P80C32X2 P80C31X2 256B 256B 256B 256B 256B 256B 128B 128B 256B 128B – 32K – 16K – 8K – 4K – – 32K – 16K – 8K – 4K – – – – – – – – – – – – – 3 3 3 3 3 3 3 3 3 3 – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – n n n n n n n n n n – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – 32 32 32 32 32 32 32 32 32 32 Program Security n n n n n n n n – – I/O Pins UART Flash PWM ROM RAM CAN OTP PCA WD I 2C SPI 12–clk 12–clk 12–clk 12–clk 12–clk 12–clk 12–clk 12–clk 12–clk 12–clk 6-clk 6-clk 6-clk 6-clk 6-clk 6-clk 6-clk 6-clk 6-clk 6-clk NOTE: 1. I2C = Inter-Integrated Circuit Bus; CAN = Controller A.


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