DatasheetsPDF.com

TDA8358J Dataheets PDF



Part Number TDA8358J
Manufacturers NXP
Logo NXP
Description Full bridge vertical deflection output circuit in LVDMOS with east-west amplifier
Datasheet TDA8358J DatasheetTDA8358J Datasheet (PDF)

INTEGRATED CIRCUITS DATA SHEET TDA8358J Full bridge vertical deflection output circuit in LVDMOS with east-west amplifier Product specification File under Integrated Circuits, IC02 1999 Dec 22 Philips Semiconductors Product specification Full bridge vertical deflection output circuit in LVDMOS with east-west amplifier FEATURES • Few external components required • High efficiency fully DC coupled vertical bridge output circuit • Vertical flyback switch with short rise and fall times • Built-in g.

  TDA8358J   TDA8358J



Document
INTEGRATED CIRCUITS DATA SHEET TDA8358J Full bridge vertical deflection output circuit in LVDMOS with east-west amplifier Product specification File under Integrated Circuits, IC02 1999 Dec 22 Philips Semiconductors Product specification Full bridge vertical deflection output circuit in LVDMOS with east-west amplifier FEATURES • Few external components required • High efficiency fully DC coupled vertical bridge output circuit • Vertical flyback switch with short rise and fall times • Built-in guard circuit • Thermal protection circuit • Improved EMC performance due to differential inputs • East-west output stage. GENERAL DESCRIPTION TDA8358J The TDA8358J is a power circuit for use in 90° and 110° colour deflection systems for 25 to 200 Hz field frequencies, and for 4 : 3 and 16 : 9 picture tubes. The IC contains a vertical deflection output circuit, operating as a high efficiency class G system. The full bridge output circuit allows DC coupling of the deflection coil in combination with single positive supply voltages. The east-west output stage is able to supply the sink current for a diode modulator circuit. The IC is constructed in a Low Voltage DMOS (LVDMOS) process that combines bipolar, CMOS and DMOS devices. DMOS transistors are used in the output stage because of absence of second breakdown. QUICK REFERENCE DATA SYMBOL Supplies VP VFB Iq(P)(av) Iq(FB)(av) PEW Ptot Vi(dif)(p-p) Io(p-p) Flyback switch Io(peak) Vo VI(bias) Io Tstg Tamb Tj maximum (peak) output current t ≤ 1.5 ms − − 2 − −55 −25 − − − − − − − − ±1.8 68 3.2 750 A supply voltage flyback supply voltage average quiescent supply current average quiescent flyback supply current east-west power dissipation total power dissipation during scan during scan 7.5 2VP − − − − − − 12 45 10 − − − 1000 − 18 66 15 10 4 15 V V mA mA W W PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Inputs and outputs differential input voltage (peak-to-peak value) output current (peak-to-peak value) 1500 3.2 mV A East-west amplifier output voltage input bias voltage output current V V mA °C °C °C Thermal data; in accordance with IEC 747-1 storage temperature ambient temperature junction temperature +150 +75 150 1999 Dec 22 2 Philips Semiconductors Product specification Full bridge vertical deflection output circuit in LVDMOS with east-west amplifier ORDERING INFORMATION TYPE NUMBER TDA8358J BLOCK DIAGRAM PACKAGE NAME DBS13P DESCRIPTION TDA8358J VERSION SOT141-6 plastic DIL-bent-SIL power package; 13 leads (lead length 12 mm) handbook, full pagewidth COMP 13 COMP. CIRCUIT GUARD 11 GUARD CIRCUIT VP 3 VFB 9 M5 D2 D3 M2 Vi(p-p) D1 VI(bias) 0 INPUT AND FEEDBACK CIRCUIT INB 2 M1 4 M3 Ii(p-p) II(av) 0 6 VGND 7 EWGND MGL866 INA 1 M4 10 OUTA 12 FEEDB Vi(p-p) VI(bias) 0 OUTB TDA8358J INEW 5 M6 8 OUTEW Fig.1 Block diagram. 1999 Dec 22 3 Philips Semiconductors Product specification Full bridge vertical deflection output circuit in LVDMOS with east-west amplifier PINNING SYMBOL INA INB VP OUTB INEW VGND EWGND OUTEW VFB OUTA GUARD FEEDB COMP PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 input A input B supply voltage output B east-west input vertical ground east-west ground east-west output flyback supply voltage output A guard output feedback input compensation input DESCRIPTION FUNCTIONAL DESCRIPTION Vertical output stage TDA8358J The vertical driver circuit has a bridge configuration. The deflection coil is connected between the complimentary driven output amplifiers. The differential input circuit is voltage driven. The input circuit is specially designed for direct connection to driver circuits delivering a differential signal but it is also suitable for single-ended applications. The output currents of the driver device are converted to voltages by the conversion resistors RCV1 and RCV2 (see Fig.3) connected to pins INA and INB. The differential input voltage is compared with the voltage across the measuring resistor RM, providing internal feedback information. The voltage across RM is proportional with the output current. The relationship between the differential input current and the output current is defined by: 2 × Ii(dif)(p-p) × RCV = Io(p-p) × RM The output current should measure 0.5 to 3.2 A (p-p) and is determined by the value of RM and RCV. The allowable input voltage range is 100 mV to 1.6 V for each input. The formula given does not include internal bondwire resistances. Depending on the value of RM and the internal bondwire resistance (typical value 50 mΩ) the actual value of the current in the deflection coil will be about 5% lower than calculated. Flyback supply handbook, halfpage INA INB VP OUTB INEW VGND EWGND OUTEW VFB 1 2 3 4 5 6 TDA8358J 7 8 9 OUTA 10 GUARD 11 FEEDB 12 COMP 13 The flyback voltage is determined by the flyback supply voltage VFB. The principle of two supply voltages (class G) allows to use an optimum supply voltage VP for scan and an optimum flyback supply voltage VFB for flyback, thus very high efficiency is achieved. The avail.


TDA8357J TDA8358J TDA8359J


@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site.
(Privacy Policy & Contact)