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TDA7479
SINGLE CHIP RDS DEMODULATOR + FILTER
VERY HIGH RDS DEMODULATION QUALITY WITH IMPROVED DIGITAL SIGNAL PROCESSING HIGH PERFORMANCE, 57KHz BANDPASS FILTER (8th ORDER) FILTER ADJUSTMENT FREE AND WITHOUT EXTERNAL COMPONENTS PURELY DIGITAL RDS DEMODULATION WITHOUT EXTERNAL COMPONENTS ARI (SK INDICATION) AND RDS SIGNAL QUALITY OUTPUT 4.332MHz CRYSTAL OSCILLATOR (8.664 and 17.328MHz OPTIONAL) LOW NOISE CMOS TECHNOLOGY LOW RADIATION DESCRIPTION The TDA7479 recovers the additional inaudible RDS information which is transmitted by FM radio broadcasting stations and operates in accordance with the EBU (European Broadcasting Union) specifications. BLOCK DIAGRAM AND TEST CIRCUIT
DIP16
SO16
ORDERING NUMBERS: TDA7479 TDA7479D
The device is made up of two sections: a cascaded antialiasing + switched capacitors bandpass filter for precise RDS band selection and a demodulating section that performs the extraction od RDS data stream (RDDA) and clock (RDCL), to be furher processed by a suitable RDS decoder. Outputs for RDS signal quality and ARI indication are also present.
C1 27pF
4.332MHz
C2 47pF
T57 15 4 270pF 2nd ORDER ANTIALIASING FILTER
OSCIN 13
OSCOUT 14
MPX
5 OSCILLATOR & DIVIDER 9
OSEL FSEL
16 FILOUT 8 8th ORDER SC-BANDPASS FILTER 57KHz PLL 1187.5Hz PLL 7 1 VS 100nF VREF 10µF INTEGRAL BIPHASE DEC. 3 + POLARITY BIPHASE DEC. 0 1 10 TEST LOGIC 2 12 FAST ARI INDICATOR QUAL DET.
RDCL
ARI QUAL
MUX
DIFF. DECODER
RDDA
TM
6 GND
11 EXTRES
D97AU751A
February 1998
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ABSOLUTE MAXIMUM RATINGS
Symbol VS Top Tstg Parameter Supply Voltage Operating Temperature Range Storage Temperature Value -0.3 to 7 -40 to 85 -55 to 150 Unit V °C °C
THERMAL DATA
Symbol Rth j-case Description Thermal Resistance Junction-case Max. DIP16 100 SO16 200 Unit °C/W
PIN DESCRIPTION
N o pin 1 2 3 4 5 6 7 Name QUAL RDDA VREF MPX OSEL GND ARI Description Output for signal quality indication (High = good) RDS data output Reference voltage RDS input signal Oscillator selector pin: - open, closed to VS = quartz oscillator - closed to GND=external driven Ground Output for ARI indication: - high when RDS+ARI are present - high when only ARI is present - low when only RDS is present - undefined when nos signal is present Filter output Frequency selector pin: -100K to VS = 17.328MHz - open = 4.332MHz - closed to V S = 8.664MHz Test mode pin: - open = normal operation - closed to V S = testmode Reset pin: - open=run mode - closed to V S = reset condition Supply voltage Oscillator input Oscillator output Testing output pin: 57kHz clock output RDS clock output 1187.5Hz
8 9
FILOUT FSEL
10 11 12 13 14 15 16
TM EXTRES VS OSCIN OSCOUT T57 RDCL
PIN CONNECTION (Top View)
QUAL RDDA VREF MPX OSEL GND ARI FILOUT 1 2 3 4 5 6 7 8
D97AU752
16 15 14 13 12 11 10 9
RDCL T57 OSCOUT OSCIN VS EXTRES TM FSEL
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THERMAL DATA
Symbol Rth j-amb Description Thermal Resistance Junction-Ambient Max DIP20 100 SO20 200 Unit °C/W
ELECTRICAL CHARACTERISTICS (Tamb = 25°C, VS = 5V, unless otherwise specified).
Symbol VS IS Parameter Supply voltage Supply current Test Condition Min. 4.5 Typ. 5 7.5 Max. 5.5 11.0 Unit V mA
FILTER
fC BW G A Center frequency 3dB Bandwidth Gain Attenuation f = 57kHz ∆f ± 4kHz f = 38kHz f = 67kHz RI RL S/N VIN VREF Input impedance of MPX Load impedance on FILOUT Signal to noise ratio MPX input signal Reference VIN = 3mVRMS f = 19kHz; T3 ≤ 40dB(1) f = 57kHz (RDS+ ARI) VS/2 56.5 2.5 18 18 50 35 80 1 30 40 1000 50 57 3 20 22 60 45 120 150 57.5 3.5 22 kHz kHz dB dB dB dB KΩ MΩ dB mVRMS mVRMS V
DEMODULATOR
Input pins (EXTRES, FSEL, TM) Input pin (OSEL) IPD IPU VIH V IL VOH V OL Input Current Input Current Input voltage high Input voltage low Ouput voltage high Output voltage low IL = 0.5mA IL = 0.5mA 4 VIN = 5V (pull-down input) VIN = 0V (pull-up input) all with internal pull down resistor with internal pull up resistor 15 -25 0.7 ⋅ VS 0.8 ⋅ VS 0.2 ⋅ VS 0.3 ⋅ VS 4.6 0.4 1 30 -10 µA µA V V V V
Output pins (RDCL, RDDA, ARI, QUAL, T57)
OSCILLATOR
VCLL VCLH V PP Input level OSCIN pin Input level OSCIN pin Amplitude OSCOUT Amplitude OSCIN (for external drive) OSEL = open circuit OSEL = open circuit OSEL = open circuit OSEL = GND, f = 4.332MHz OSEL = GND, f = 8.664MHz OSEL = GND, f = 17.328MHz
(1) The 3rd harmonic (57kHz) must be less than -40dB with respect to the input signal plus gain.
1 4 4.5 100 120 150
V V V mVpp mVpp mVpp
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TDA7479
Figure 1. RDS timing diagram
CLOCK LINE
DATA LINE
OUTPUT TIMING The RDS (1187.5Hz) output clock on RDCL line is synchronized to the incoming data. According to the internal PLL lock condition data change can result on the falling or on the rising clock edge. (see Fig. 1) Whichever clock edge is used by the decoder (rising or falling edge) the data will remain valid for 416.7 µsec after the clock transition. OSCILLATOR CONTROLS (FSEL, OSEL) Three different crystal frequencies can be used. The adaption of the internal clock divider to the external crystal is achieved via the inpu.