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TDA7449 Dataheets PDF



Part Number TDA7449
Manufacturers ST Microelectronics
Logo ST Microelectronics
Description Digital tone control audio processor
Datasheet TDA7449 DatasheetTDA7449 Datasheet (PDF)

TDA7449 Digital tone control audio processor Datasheet - production data Description The TDA7449 is a volume tone (bass and treble) ) SO20 ct(s Features rodu  Input multiplexer – Two stereo inputs P – Selectable input gain for optimal adaptation te to different sources le  One stereo output so  Treble and bass control in 2.0 db steps b  Volume control in 1.0 db steps - O  Two speaker attenuators: ) – Two independent speaker controls in t(s 1.0 db steps to facilitate balance c – Indepen.

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TDA7449 Digital tone control audio processor Datasheet - production data Description The TDA7449 is a volume tone (bass and treble) ) SO20 ct(s Features rodu  Input multiplexer – Two stereo inputs P – Selectable input gain for optimal adaptation te to different sources le  One stereo output so  Treble and bass control in 2.0 db steps b  Volume control in 1.0 db steps - O  Two speaker attenuators: ) – Two independent speaker controls in t(s 1.0 db steps to facilitate balance c – Independent mute function du  All functions are programmable via serial bus balance (left/right) processor for quality audio applications in TV systems. Selectable input gain is provided. A serial bus controls all functions. The AC signal setting is obtained by resistor networks and switches combined with operational amplifiers. Bipolar/CMOS technology used allows obtaining low distortion, low noise and DC stepping. Table 1. Device summary Order code Package Packing TDA7449D13TR SO20 Tape and reel lete Pro 8 o L-IN1 100K bs 9 O L-IN2 100K Figure 1. Block diagram MUXOUTL 10 TREBLE(L) BIN(L) BOUT(L) 16 15 14 RB G VOLUME TREBLE BASS SPKR ATT LEFT 5 LOUT 7 R-IN1 100K 6 R-IN2 100K 0/30dB 2dB STEP I2CBUS DECODER + LATCHES 19 SCL 20 SDA 18 DIG_GND G VOLUME TREBLE BASS SPKR ATT RIGHT VREF INPUT MULTIPLEXER + GAIN 11 MUXOUTR SUPPLY RB 17 12 13 1 TREBLE(R) BIN(R) BOUT(R) CREF 4 ROUT 2 3 VS AGND D98AU847A September 2014 This is information on a product in full production. DocID006317 Rev 5 1/21 www.st.com Contents Contents TDA7449 1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics and test circuit . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Application recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.1 Bass, stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.2 Treble stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 t(s) 3.3 CREF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 duc 4 I2C bus interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 ro 4.1 Data validity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 te P 4.2 Start and stop conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 le 4.3 Byte format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 so 4.4 Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 b 4.5 Transmission without acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 t(s) - O 5 Software specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 c 5.1 Interface protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 rodu 6 Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 P 6.1 No incremental bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 te6.2 Incremental bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Obsole 7 Data bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 8 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 2/21 DocID006317 Rev 5 TDA7449 1 Overview Overview Table 2. Absolute maximum ratings Symbol Parameter Value Unit VS Tamb Tstg Operating supply voltage Operating ambient temperature Storage temperature range 10.5 V 0 to 70 C -55 to 150 C Figure 2. Pin connections t(s) CREF c VS u PGND d ROUT ro LOUT P R_IN2 te R_IN1 le L_IN1 so L_IN2 Ob MUXOUT(L) 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 D98AU848 SDA SCL DIG_GND TREBLE(R) TREBLE(L) BIN(L) BOUT(L) BOUT(R) BIN(R) MUXOUT(R) t(s) -Table 3. Thermal data c Symbol Parameter du Rth j-pin Thermal resistance junction pins Value 85 Unit °C/W Pro Table 4. Quick reference data teSymbol Parameter ole VS bs VCL O THD Supply voltage Max input signal handling Total harmonic distortion V = 0.1 Vrms f = 1 kHz Min. Typ. Max. Unit 6 9 10.2 V 2 VRMS 0.01 0.1 % S/N Signal-to-noise ratio Vout = 1 Vrms (mode = OFF) SC Channel separation f = 1 KHz Input gain (2 dB step) 106 dB 90 dB 0 30 dB Volume control (1 dB step) -47 0 dB Treble control (2 dB step) -14 14 dB Bass control (2 dB step) -14 14 dB Bala.


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