USS-820D

Data Sheet, Rev. 4 June 2001 USS-820D USB Device Controller Features New Features After Revision B I Full compliance with the Universal Serial Bus Specification Revision 1.1. I Backward compatible with USS-820B and USS-820C revisions. I Self-powered or bus-powered USB device. Meets USB power specifications for bus-powered devices. I Full-speed USB device (12 Mbits/s). I USB device controller with protocol control and administration for up to 16 USB endpoints. I Supports control, interrupt, bulk, and isochronous transfers for all 16 endpoints. I Programmable endpoint types and FIFO sizes and internal 1120-byte logical (2240-byte physical for dual-packet mode) shared FIFO storage allow a wide variety of configurations. I Dual-packet mode of FIFOs reduces latency. I Supports USB remote wake-up feature. I On-chip crystal oscillator allows external 12 MHz crystal or 3 V/5 V clock source. I On-chip analog PLL creates 48 MHz clock from internal 12 MHz clock. I Integrated USB transceivers. I 5 V tolerant I/O buffers allow operation in 3 V or 5 V system environments for 0 °C to 70 °C temperature range. I 5 V tolerant I/O buffers allow operation in 3 V only system environments for –20 °C to +85 °C temperature range. I Implemented in Agere Systems Inc. 0.25 µm, 3 V standard-cell library. I 44-pin MQFP (USS-820D). I 48-pin TQFP (USS-820TD). I Evaluation kit available. I New, centralized FIFO status bits and interrupt output pin reduce firmware load. I New, additional nonisochronous ...