V53C808H

MOSEL VITELIC V53C808H HIGH PERFORMANCE 1M x 8 BIT EDO PAGE MODE CMOS DYNAMIC RAM OPTIONAL SELF REFRESH 35 35 ns 18 ns 14 ns 70 ns PRELIMINARY HIGH PERFORMANCE Max. RAS Access Time, (tRAC) Max. Column Address Access Time, (tCAA) Min. Extended Data Out Mode Cycle Time, (tPC) Min. Read/Write Cycle Time, (tRC) 40 40 ns 20 ns 15 ns 75 ns 45 45 ns 22 ns 17 ns 80 ns 50 50 ns 24 ns 19 ns 90 ns Features s 1M x 8-bit organization s EDO Page Mode for a sustained data rate of 72 MHz s RAS access time: 35, 40, 45, 50 ns s Low power dissipation s Read-Modify-Write, RAS-Only Refresh, CAS-Before-RAS Refresh capability s Optional Self Refresh (V53C808SH) s Refresh Interval: 1024 cycles/16 ms s Available in 28-pin 400 mil SOJ package s Single +5V ± 10% Power Supply s TTL Interface Description The V53C808H is a ultra high speed 1,048,576 x 8 bit CMOS dynamic random access memory. The V53C808H offers a combination of features: Page Mode with Extended Data Output for high data bandwidth, and Low CMOS standby current. All inputs and outputs are TTL compatible. Input and output capacitances are significantly lowered to allow increased system performance. Page Mode with Extended Data Output operation allows random access of up to 1024 x 8 bits within a row with cycle times as fast as 14 ns. The V53C808H is ideally suited for graphics, digital signal processing and high-performance computing systems. Device Usage Chart Operating Temperature Range 0°C to 70 °C Package Outline K T 35 Ac...