Document
®
VIPer20/SP/DIP VIPer20A/ASP/ADIP
SMPS PRIMARY I.C.
T YPE VIPer20/SP/DIP VIPer20A/ASP/ADIP
V DSS 620V 700V
In 0.5 A 0.5 A
R DS(on) 16 Ω 18 Ω
PENTAWATT HV FEATURE s ADJUSTABLE SWITCHING FREQUENCY UP TO 200KHZ s CURRENT MODE CONTROL s SOFT START AND SHUT DOWN CONTROL s AUTOMATIC BURST MODE OPERATION IN STAND-BY CONDITION ABLE TO MEET ”BLUE ANGEL” NORM (<1W TOTAL POWER CONSUMPTION) s INTERNALLY TRIMMED ZENER REFERENCE s UNDERVOLTAGE LOCK-OUT WITH HYSTERESIS s INTEGRATED START-UP SUPPLY s AVALANCHE RUGGED s OVERTEMPERATURE PROTECTION s LOW STAND-BY CURRENT s ADJUSTABLE CURRENT LIMITATION DESCRIPTION VIPer20/20A, made BLOCK DIAGRAM
OSC
PENTAWATT HV (022Y)
10
1
PowerSO-10
DIP-8
using
VIPower
M0
Technology, combines on the same silicon chip a state-of-the-art PWM circuit together with an optimized high voltage avalanche rugged Vertical Power MOSFET (620V or 700V / 0.5A). Typical applications cover off line power supplies with a secondary power capability of 10W in wide range condition and 20W in single range or with doubler configuration. It is compatible from both primary or secondary regulation loop despite using around 50% less components when compared with a discrete solution. Burst mode operation is an additional feature of this device, offering the possibility to operate in stand-by mode without extra components.
DRAIN
ON/OFF OSCILLATOR
SECURITY LATCH VDD UVLO LOGIC R/S FF S Q
PWM LATCH R1 S FF R2 R3 Q
OVERTEMP. DETECTOR
0.5 V
+ _
1.7 µs delay
250 ns Blanking
+ _
+
0.5V _ 6 V/A CURRENT AMPLIFIER
_ 13 V +
ERROR AMPLIFIER
4.5V
COMP
SOURCE
FC00491
November 1999
1/21
VIPer20/SP/DIP - VIPer20A/ASP/ADIP
ABSOLUTE MAXIMUM RATING
Symb ol V DS Parameter Continuous Drain-Source Voltage (Tj = 25 to 125o C) for VIPer20/SP/DIP for VIPer20A/ASP/ADIP Maximum Current Supply Voltage Voltage Range Input Voltage Range Input Maximum Continuous Current Electrostatic discharge (R = 1.5 K Ω C = 100pF) Avalanche Drain-Source Current, Repetitive or Not-Repetitive o (T C = 100 C, Pulse Width Limited by T J max, δ <1%) for VIPer20/SP for VIPer20A/ASP/ADIP o Power Dissipation at T c = 25 C Junction Operating Temperature Storage Temperature Value -0.3 to 620 -0.3 to 700 Internally Limited 0 to 15 0 to V DD 0 to 5 ±2 4000 Unit V V A V V V mA V
ID VDD V OSC V COMP I COMP V esd I D(AR)
P tot Tj T s tg
0.5 0.4 57 Internally Limited -65 to 150
A A W o C o C
THERMAL DATA
PENT AW ATT R thj-p in R t hj-ca se R th j-a mb. Thermal Resistance Junction-case Thermal Resistance Ambient-case Max Max 2.0 70 2.0 60 35 # PowerSO-10 DIP-8 20
o o o
C/W C/W C/W
(*) When mounted using the minimum recommended pad size on FR-4 board. # On multylayer PCB
CONNECTION DIAGRAMS (Top View) PENTAWATT HV PENTAWATT HV (022Y) PowerSO-10
OS C Vdd SOURC E COMP 4 5
SC 10540
DIP-8
1 8 DRAIN DRAIN DRAIN DRAIN
CURRENT AND VOLTAGE CONVENTIONS
IDD ID
VDD
DRAIN
IOSC
OSC
13V
+
COMP SOURCE
VDD
VDS
ICOMP VOSC VCOMP
FC00020
2/21
VIPer20/SP/DIP - VIPer20A/ASP/ADIP
ORDERING NUMBERS
PENTAW AT T HV VIPer20 VIPer20A PENT AW ATT HV (022Y) VIPer20 (022Y) VIPer20A (022Y) PowerSO-10 VIPer20SP VIP er20ASP DIP -8 VIPer20DIP VIPer20ADIP
PINS FUNCTIONAL DESCRIPTION DRAIN PIN: Integrated power MOSFET drain pin. It provides internal bias current during start-up via an integrated high voltage current source which is switched off during normal operation. The device is able to handle an unclamped current during its normal operation, assuring self protection against voltage surges, PCB stray inductance, and allowing a snubberless operation for low output power. SOURCE PIN: Power MOSFET source pin. Primary side circuit common ground connection. VDD PIN : This pin provides two functions :
constant current source, and can easily be connected to the output of an optocoupler. Note that any overvoltage due to regulation loop failure is still detected by the error amplifier through the VDD voltage, which cannot overpass 13V. The output voltage will be somewhat higher than the nominal one, but still under control. COMP PIN : This pin provides two functions :
- It is the output of the error transconductance
amplifier, and allows for the connection of a compensation network to provide the desired transfer function of the regulation loop. Its bandwidth can be easily adjusted to the needed value with usual components value. As stated above, secondary regulation configurations are also implemented through the COMP pin.
- It corresponds to the low voltage supply of the
control part of the circuit. If VDD goes below 8V, the start-up current source is activated and the output power MOSFET is switched off until the VDD voltage reaches 11V. During this phase, the internal current consumption is reduced, the VDD pin is sourcing a current of about 2mA and the COMP pin is shorted to ground. After that, the current source is shut down, and the device tries to start up by switching again.
- When the COMP voltage is going below 0.5V,
the shut-down of the circuit o.