Document
M61538FP
6-Channel Electronic Volume
REJ03F0103-0100Z Rev.1.0 Mar.23.2004
Description
The M61538FP is 6ch electronic volume. This IC is controlled by 2-wire serial bus and is suitable for Home Audio System.
Features
• Electronic Volume • • • • 0 to –95dB, –∞/1dBstep 6-Channel independent Electronic Volume MUC I/F Controlled by serial data from microcomputer Low Noise 0.85µVrms: typ. [Volume = 0dB, Rg = 0Ω, IHF-A] Low Distortion 0.0012%: typ. [Vi:0.3Vrms, f:1kHz, BW:400Hz to 30kHz] Power Supply ±Power supplies or Single power supply
Applications
• Receiver, AV Amp, Mini Stereo etc.
Recommended Operating Condition
• Supply Voltage Range ±Power supplies VCC: +4.5 to +7.5V [Typ: 7V], VEE: –4.5 to –7.5V[Typ: –7V], DVDD: +2.7 to + 5.5V [Typ:5V] Single power supply VCC: +9 to +12V[Typ: 10V], DVDD: 4.5 to +5.5V[Typ: 5V]
System Block Diagram
(±Power supplies used)
LIN RIN CIN SWIN SLIN SRIN
LOUT ROUT COUT SWOUT SLOUT SROUT
Logic CLOCK DATA DGND DVDD VCC AGND VEE
Rev.1.0, Mar.23.2004, page 1 of 11
M61538FP
Block Diagram and Pin Configuration
LIN 13 AGND 14 RIN 15 AGND 16 CIN 17 VCC 18
MCU I/F
Vol
25K Vol
12 AGND 11 LOUT 10 ROUT 9 COUT 8 DGND 7 CLOCK
Logic
25K Vol
25K
VEE 19 SWIN 20 AGND 21 SLIN 22 AGND 23 SRIN 24
6 DATA 5 DVDD 4 SWOUT 3 SLOUT 2 SROUT 1 AGND
25K Vol
25K Vol
25K Vol
(Top View)
Pin Description
(±Power supplies used)
PIN No. 1, 23 2 3 4 5 6, 7 8 9 10 11 12, 14 13 15 16, 21 17 18 19 20 22 24 Name AGND SROUT SLOUT SWOUT DVDD DATA, CLOCK DGND COUT ROUT LOUT AGND LIN RIN AGND CIN VCC VEE SWIN SLIN SRIN Function Analog ground of SW/SL/SR volume Output pin of SR channel Output pin of SL channel Output pin of SW channel Digital Power supply (Typ: 5V) Input pin of Control data/clock Digital ground Output pin of C channel Output pin of R channel Output pin of L channel Analog ground of L/R/C volume Input pin of L channel Input pin of R channel Analog ground of all channels Input pin of C channel Positive Power supply (Typ: +7V) Negative Power supply (Typ: –7V) Input pin of SW channel Input pin of SL channel Input pin of SR channel
Rev.1.0, Mar.23.2004, page 2 of 11
M61538FP
Absolute Maximum Ratings
Parameter Analog Power supply Digital Power supply Power dissipation Thermal derating Operating temperature Storage temperature Symbol VCC-VEE DVDD-DGND Pd K Topr Tstg Ratings 16 7 1.0 10.0 –20 to +75 −40 to +125 Unit V V W mW/°C °C °C Condition VCC-VEE (±Power supplies used) DVDD-DGND Ta ≤ 25°C Ta > 25°C
Note: VEE ≤ DGND < DVDD ≤ VCC
Thermal Deratings (Maximum Rating)
1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 -40 0 40
POWER DISSIPATION pd (W)
75 80
120
150
AMBIENT TEMPERATURE Ta (°C)
Rev.1.0, Mar.23.2004, page 3 of 11
M61538FP
Recommended Operating Conditions
(Ta = 25°C, unless otherwise noted)
Limits Parameter Analog supply voltage (Positive) Analog supply voltage (Negative) Analog supply voltage Symbol VCC VEE VCC Min 4.5 –7.5 9 2.7 4.5 DVDD ×0.7 DGND Typ 7 –7 10 5 5 — — Max 7.5 –4.5 12 5.5 5.5 DVDD DVDD ×0.3 Units V V V V V V V Conditions ±Power supplies used ±Power supplies used Single power supply used ±Power supplies used, DGND = 0V Single power supply used, DGND = 0V DGND = 0V DGND = 0V
Digital supply voltage
VDD
Logic “H” level input voltage Logic “L” level input voltage
VIH VIL
Notes: 1. VEE ≤ DGND < DVDD ≤ VCC 2. Apply VCC, VEE and DVDD at the same time.
Relationship between Data and Clock
Data signal is read at the rising edge of CLOCK. Make "H" at the timing which DATA of D0-D15 make latch.
DATA
D0
D1
D2
D3
D13
D14
D15
CLOCK
When DATA is "H", latch signal is created at the falling edge of CLOCK.
Rev.1.0, Mar.23.2004, page 4 of 11
M61538FP
Clock and Data Timings
(D0 ~ D15)
DATA
LATCH
t cr
75% 25% tSLD 75% 50% 25%
CLOCK
tHLD tSHD
tHHD
tSLD
tHLD
tr tWHC
tf tWLC
Timing Definition of Digital Block
Limits Parameter CLOCK cycle time CLOCK pulse width (“H” level) CLOCK pulse width (“L” level) Rising time of clock and data Falling time of clock and data DATA setup time (Rising time of clock) DATA setup time (Falling time of clock) DATA hold time (“H” level) DATA hold time (“L” level) Symbol tcr tWHC tWLC tr tf tSHD tSLD tHHD tHLD Min 8 3.2 3.2 — — 1.6 1.6 1.6 1.6 Typ — — — — — — — — — Max — — — 0.8 0.8 — — — — µs Units
Rev.1.0, Mar.23.2004, page 5 of 11
M61538FP
Power on Reset
This IC built-in the power on reset function. The voltage of DVDD (5 pin) -DGND (8 pin) less than 2.6V, the serial DATA can not accept.
(V)
DVDD(5pin) - DGND(8pin)
2.6V
(S) Reset time After reset is canceled, the serial DATA can accept.
Release of reset.
Data Control Specification
Three types of input format can be selected by changing the D14/D15 slot setting status. (Initialize all data of the 3 formats when power supply (DVDD) turn on.)
(1)
D0a D1a D2a D3a D4a D5a D6a D7a D8a D9a D10a D11a D12a D13a D14 D15
L Channel volume R Channel volume 0 0
(2)
D0b D1b D2b D3b D4b D5b D6b D7b D8b D9b D10b D11b D12b D13b D14 D15
C Channel volume SW Channel volume 0 1
(3)
D0c D1.