SJA1000

INTEGRATED CIRCUITS DATA SHEET SJA1000 Stand-alone CAN controller Product specification Supersedes data of 1999 Aug 17 File under Integrated Circuits, IC18 2000 Jan 04 Philips Semiconductors Product specification Stand-alone CAN controller CONTENTS 1 2 3 4 5 6 6.1 6.1.1 6.1.2 6.1.3 6.1.4 6.1.5 6.1.6 6.1.7 6.2 6.2.1 6.2.2 6.3 6.3.1 6.3.2 6.3.3 6.3.4 6.3.5 6.3.6 6.3.7 6.3.8 6.3.9 6.4 6.4.1 6.4.2 6.4.3 6.4.4 6.4.5 6.4.6 6.4.7 6.4.8 6.4.9 6.4.10 6.4.11 6.4.12 6.4.13 6.4.14 6.4.15 6.4.16 6.4.17 6.5 6.5.1 6.5.2 FEATURES GENERAL DESCRIPTION ORDERING INFORMATION BLOCK DIAGRAM PINNING FUNCTIONAL DESCRIPTION Description of the CAN controller blocks Interface Management Logic (IML) Transmit Buffer (TXB) Receive Buffer (RXB, RXFIFO) Acceptance Filter (ACF) Bit Stream Processor (BSP) Bit Timing Logic (BTL) Error Management Logic (EML) Detailed description of the CAN controller PCA82C200 compatibility Differences between BasicCAN and PeliCAN mode BasicCAN mode BasicCAN address layout Reset values Control Register (CR) Command Register (CMR) Status Register (SR) Interrupt Register (IR) Transmit buffer layout Receive buffer Acceptance filter PeliCAN mode PeliCAN address layout Reset values Mode Register (MOD) Command Register (CMR) Status Register (SR) Interrupt Register (IR) Interrupt Enable Register (IER) Arbitration Lost Capture register (ALC) Error Code Capture register (ECC) Error Warning Limit Register (EWLR) RX Error Counter Register (RXERR) TX Error Counter Register (TXERR) Transm...