Dual N-Channel 100-V (D-S) MOSFET
SPICE Device Model Si7922DN
Vishay Siliconix
Dual N-Channel 100-V (D-S) MOSFET
CHARACTERISTICS
• N-Channel Vertical DMO...
Description
SPICE Device Model Si7922DN
Vishay Siliconix
Dual N-Channel 100-V (D-S) MOSFET
CHARACTERISTICS
N-Channel Vertical DMOS Macro Model (Subcircuit Model) Level 3 MOS Apply for both Linear and Switching Application Accurate over the −55 to 125°C Temperature Range Model the Gate Charge, Transient, and Diode Reverse Recovery Characteristics
DESCRIPTION
The attached spice model describes the typical electrical characteristics of the n-channel vertical DMOS. The subcircuit model is extracted and optimized over the −55 to 125°C temperature ranges under the pulsed 0 to 10V gate drive. The saturated output impedance is best fit at the gate bias near the threshold voltage. A novel gate-to-drain feedback capacitance network is used to model the gate charge characteristics while avoiding convergence difficulties of the switched Cgd model. All model parameter values are optimized to provide a best fit to the measured electrical data and are not intended as an exact physical interpretation of the device.
SUBCIRCUIT MODEL SCHEMATIC
This document is intended as a SPICE modeling guideline and does not constitute a commercial product data sheet. Designers should refer to the appropriate data sheet of the same number for guaranteed specification limits. Document Number: 70322 31-May-04 www.vishay.com
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SPICE Device Model Si7922DN
Vishay Siliconix
SPECIFICATIONS (TJ = 25°C UNLESS OTHERWISE NOTED) Parameter Static
Gate Threshold Voltage On-State Drain Current
a
Symbol
Test Condit...
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