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SM5849AF Dataheets PDF



Part Number SM5849AF
Manufacturers Nippon Precision Circuits Inc
Logo Nippon Precision Circuits Inc
Description Asynchronous Sample Rate Converter
Datasheet SM5849AF DatasheetSM5849AF Datasheet (PDF)

SM5849AF NIPPON PRECISION CIRCUITS INC. Asynchronous Sample Rate Converter OVERVIEW The SM5849AF is a digital audio signal, asynchronous sample rate converter LSI. It supports 16/20/24-bit word length input data, 16/20/24-bit word length output data, 2kHz to 100kHz input sample rate range, and 4kHz to 200kHz output sample rate range. It also features a built-in digital deemphasis filter and digital attenuator. FEATURES Functions s s s s Filter Characteristics and Converter Efficiency s s s s.

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SM5849AF NIPPON PRECISION CIRCUITS INC. Asynchronous Sample Rate Converter OVERVIEW The SM5849AF is a digital audio signal, asynchronous sample rate converter LSI. It supports 16/20/24-bit word length input data, 16/20/24-bit word length output data, 2kHz to 100kHz input sample rate range, and 4kHz to 200kHz output sample rate range. It also features a built-in digital deemphasis filter and digital attenuator. FEATURES Functions s s s s Filter Characteristics and Converter Efficiency s s s s s s s s s s s s s Left/right-channel processing (stereo) 2 to 100kHz input sample rate range (fsi) 4 to 200kHz output sample rate range (fso) 0.45 to 2.2-times variable sample rate conversion ratio (fso/fsi) Asynchronous input and output timing (clock inputs) System clock inputs (input and output clocks independent) • 256fsi or 384fsi input system clock select • 256fso or 384fso output system clock select Deemphasis filter • IIR-type filter • 44.1, 48 or 32kHz Digital attenuator • 11-bit data, 1025 levels • Smooth attenuation change • +12dB gain shift function Direct mute function Through mode operation • Direct connection from input to output Output data clocks (LRCO, BCKO) • Slave mode: external input • Master mode: output system clock generated internally Dither round-off processing • Dither round-off ON/OFF selectable 3.3V single supply 80-pin QFP Silicon-gate CMOS process s s s 24-bit internal data word length Deemphasis filter characteristics (IIR filter) • ±0.03dB gain deviation from ideal filter characteristics Anti-aliasing LPF characteristics • Output/input sample rate conversion ratio automatic filter select (6 FIR filters) - Up converter LPF 1.0 to 2.2 times - Down converter LPF I 0.92 times: 48.0 to 44.1kHz - Down converter LPF II 0.73 times: 44.1 to 32.0kHz - Down converter LPF III 0.67 times: 48.0 to 32.0kHz - Down converter LPF IV 0.5 times: 48.0 to 24.0kHz - Down converter LPF V 0.45 times: 48.0 to 22.1kHz • ±0.00005dB passband ripple • > 110dB stopband attenuation Converter noise levels • ≤ −110dB internal calculation (quantization) noise • −98dB (16-bit output), −122dB (20-bit output), and −146dB (24-bit output) word rounding noise Output S/N ratio (theoretical values) S/N ratio Output signal w ord length 16 bits 20 bits 24 bits 16-bit input w ord length 94.8dB 97.7dB 97.7dB 20-bit input w ord length 97.7dB 109.5dB 109.7dB 24-bit input w ord length 97.7dB 109.7dB 110dB NIPPON PRECISION CIRCUITS—1 SM5849AF Interfaces s Input data format • 2s-complement, L/R alternating, serial • IIS/non-IIS format Mode 1 2 16 bits 3 4 5 6 20 bits 7 8 9 10 24 bits 11 12 Left justified IIS M S B fi rst M S B fi rst Left justified IIS Right justified Right justified M S B fi rst M S B fi rst M S B fi rst LSB first Left justified IIS Right justified Right justified M S B fi rst M S B fi rst M S B fi rst LSB first W ord length Data position Right justified Right justified Data sequence M S B fi rst LSB first s Output data format • 2s-complement, MSB first, L/R alternating, serial • Continuous bit clock Mode 1 2 3 4 5 6 7 W ord length 16 bits 20 bits 24 bits 24 bits 16 bits Left justified 20 bits 24 bits IIS Nor mal (non IIS) Right justified IIS selection Data position APPLICATIONS s Digital audio equipment-interface sample rate conversion (AV amplifiers, CD-R, DAT, MD and 8mm VTRs) s Commercial recording/editing equipment sample rate conversion ORDERING INFORMATION D e vice SM5849AF P ackag e 80-pin QFP NIPPON PRECISION CIRCUITS—2 SM5849AF PINOUT Top view 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 VSS N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C. SLAVE THRUN RSTN DITHN TST2N STATE IISN OWL1 OWL2 VDD VDD OCKSL OCLK VSS LRCO BCKO DOUT N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C. VSS 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 SM5849AF JAPAN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 VSS N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C. MLEN/DEEM MCK/FSI2 MDT/FSI1 MCOM DMUTE VDD PACKAGE DIMENSIONS (Unit: mm) 80-pin QFP 14 0.4 12 0.1 14 0.4 12 0.1 VDD DI BCKI LRCI VSS ICLK ICKSL IFM1 IFM2 IWL1 IWL2 N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C. VSS 0.5 1.7max 0.1 0.18 0.05 1.4 0.1 0.05 0.125 0.025 0 to 10 0.1 0.5 0.2 NIPPON PRECISION CIRCUITS—3 SM5849AF BLOCK DIAGRAM IWL1 IWL2 IFM1 IFM2 BCKI DI MCOM MDT/FSI1 MCK/FSI2 MLEN/DEEM Deemphasis and attenuator setup Input data interface Arithmetic operations ICLK ICKSL Input-stage divider Deemphasis operation LRCI RSTN Input timing controller Attenuator Filter characteristic select Interpolation filter operation Dither operation DITHN TST2N Output operation timing controller Output operation OWL1 OWL2 IISN Output format controller Output data interface SLAVE Output-stage clock select LRCI BCKI DI OCLK OCKSL Output-stage divider Through mode switching THRUN DMUTE Mute generator Direct mute STATE LRCO BCKO DOUT NIPPON PRECIS.


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