1M x 36 & 2M x 18 & 4M x 9 QDR II b2 SRAM
K7R323682M K7R321882M K7R320982M
1Mx36 & 2Mx18 & 4Mx9 QDRTM II b2 SRAM
Document Title
1Mx36-bit, 2Mx18-bit, 4Mx9-bit Q...
Description
K7R323682M K7R321882M K7R320982M
1Mx36 & 2Mx18 & 4Mx9 QDRTM II b2 SRAM
Document Title
1Mx36-bit, 2Mx18-bit, 4Mx9-bit QDRTM II b2 SRAM
Revision History
Rev. No.
History
0.0 1. Initial document.
0.1 1. Pin name change from DLL to Doff. 2. Vddq range change from 1.5V to 1.5V~1.8V. 3. Update JTAG test conditions.
4. Reserved pin for high density name change from NC to Vss/SA 5. Delete AC test condition about Clock Input timing Reference Level 6. Delete clock description on page 2 and add HSTL I/O comment
0.2 1. Update current characteristics in DC electrical characteristics 2. Change AC timing characteristics 3. Update JTAG instruction coding and diagrams
0.3 1. Add 4Mx9 Organization. 2. Add -FC25 part (Part Number, Idd, AC Characteristics) 3. Add AC electrical characteristics. 4. Change AC timing characteristics. 5. Change DC electrical characteristics(ISB1)
0.4 1. Change the data Setup/Hold time. 2. Change the Access Time.(tCHQV, tCHQX, etc.) 3. Change the Clock Cycle Time.(MAX...
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