S3C3410X

22-S3-C3410X-062001 USER'S MANUAL S3C3410X 16-Bit CMOS Microcontrollers Revision 2 NOTIFICATION OF REVISIONS ORIGINATOR: PRODUCT NAME: DOCUMENT NAME: DOCUMENT NUMBER: EFFECTIVE DATE: SUMMARY: Samsung Electronics, SOC Development Group, Ki-Heung, South Korea S3C3410X RISC Microcontroller S3C3410X User's Manual, Revision 2 22-S3-C3410X-06-2001 June, 2001 As a result of additional product testing and evaluation, to correct the errata and to add more detailed explanations, some specifications published in the S3C3410X User's Manual, Revision 1, have been changed. These changes for S3C3410X microcontroller, which are described in detail in the Revision Descriptions section below, are related to the followings: — Chapter 1. Pin Descriptions — Chapter 4. EXTCONx, EXTPORT, EXTDATx and Timing Diagrams — Chapter 5. Cache Disable Operation — Chapter 7. Port 7 and Port 9 Control Registers — Chapter 11. Interrupt Priority Register (INTPRIx) — Chapter 14. Multi-Master IIC-Bus Status Register (IICSTAT) DIRECTIONS: Please note the changes in your copy (copies) of the S3C3410X User's Manual, Revision 1. Or, simply attach the Revision Descriptions of the next page to S3C3410X User's Manual, Revision 1. REVISION HISTORY Revision 0 1 2 Date – August, 2000 June, 2001 Remark There is no preliminary spec. Reviewed by Gwang-Su Han. Reviewed by Gwang-Su Han. REVISION DESCRIPTIONS 1. PIN DESCRIPTIONS: 1) Pin descriptions about A[23:0], D[15:0], nCS[7:0] nECS[1:0], nWAIT and nWREXP, are chan...