ispPAC10-01SI

ispPAC 10 ® In-System Programmable Analog Circuit Features IN-SYSTEM PROGRAMMABLE (ISP™) ANALOG CIRCUIT — Four Instrument Amplifier Gain/Attenuation Stages — Signal Summation (Up to 4 Inputs) — Precision Active Filtering (10kHz to 100kHz) — No External Components Needed for Configuration — Non-Volatile E2CMOS® Cells (10,000 Cycles) — IEEE 1149.1 JTAG Serial Port Programming FOUR LINEAR ELEMENT BUILDING BLOCKS — Programmable Gain Range (0dB to 80dB) — Bandwidth of 550kHz (G=1), 330kHz (G=10) — Low Distortion (THD < -74dB max @ 10kHz) — Auto-Calibrated Input Offset Voltage TRUE DIFFERENTIAL I/O (±3V RANGE) — High CMR (69dB) Instrument Amplifier Inputs — 2.5V Common Mode Reference on Chip — Four Rail-to-Rail Voltage Outputs 28-PIN PLASTIC DIP OR SOIC PACKAGE — Single Supply 5V Operation APPLICATIONS INCLUDE INTEGRATED: — Single +5V Supply Signal Conditioning — Active Filters, Gain Stages, Summing Blocks — Analog Front Ends, 12-Bit Data Acq. Systems — Sensor Signal Conditioning Functional Block Diagram OUT2+ OUT2– IN2+ IN2– TDI TRST VS TDO TCK 1 2 3 4 5 6 7 8 9 IA IA IA IA OA OA 28 OUT1+ 27 OUT1– 26 IN1+ IA IA 25 IN1– 24 TEST 23 TEST Configuration Memory Analog Routing Pool Reference & Auto-Calibration 22 VREFOUT 21 GND 20 CAL IA IA 19 CMV IN 18 IN3– 17 IN3+ 16 OUT3– TMS 10 IN4– 11 IN4+ 12 OUT4– 13 OUT4+ 14 Description The ispPAC10 is a member of the Lattice family of InSystem Programmable analog circuits, digitally configured via nonvolatile E2CMOS technolog...