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KM416RD8AS Dataheets PDF



Part Number KM416RD8AS
Manufacturers Samsung semiconductor
Logo Samsung semiconductor
Description 128Mbit RDRAM 256K x 16 bit x 2*16 Dependent Banks Direct RDRAMTM for Consumer Package
Datasheet KM416RD8AS DatasheetKM416RD8AS Datasheet (PDF)

KM416RD8AS Target Direct RDRAM™ 128Mbit RDRAM 256K x 16 bit x 2*16 Dependent Banks for Consumer Package Direct RDRAMTM Revision 0.9 July 1999 Rev. 0.9 July 1999 KM416RD8AS Revision History Version 0.9 (July 1999) -Target - Based on the Rambus Datasheet ver. 0.9. - For Consumer Package. Target Direct RDRAM™ Rev. 0.9 July 1999 KM416RD8AS ORDERING INFORMATION 1 2 3 4 5 6 7 8 9 10 Target Direct RDRAM™ KM 4 XX XX XX X X - X X XX SAMSUNG Memory Device Organization Product Density Speed tRA.

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KM416RD8AS Target Direct RDRAM™ 128Mbit RDRAM 256K x 16 bit x 2*16 Dependent Banks for Consumer Package Direct RDRAMTM Revision 0.9 July 1999 Rev. 0.9 July 1999 KM416RD8AS Revision History Version 0.9 (July 1999) -Target - Based on the Rambus Datasheet ver. 0.9. - For Consumer Package. Target Direct RDRAM™ Rev. 0.9 July 1999 KM416RD8AS ORDERING INFORMATION 1 2 3 4 5 6 7 8 9 10 Target Direct RDRAM™ KM 4 XX XX XX X X - X X XX SAMSUNG Memory Device Organization Product Density Speed tRAC(Row Access Time) Power & Refresh Package Type Revision 1. SAMSUNG Memory 2. Device - 4 : DRAM 7. Package Type - C : u - BGA(CSP-Forward) - D : u - BGA(CSP-Reverse) - W : WL - CSP - S : u-BGA For Consumer Package 3. Organization - 16 : x16 bit - 18 : x18 bit 8. Power & Refresh - Blank : Normal Power Self Refesh(32m/8K, 3.9us) -L : Low Power Self Refesh(32m/8K, 3.9us) -R : Normal Power Self Refesh(32m/16K, 1.9us) -S : Low Power Self Refesh(32m/16K, 1.9us) 4. Product - RD : Direct RAMBUS DRAM 5. Density - 2 : 2M - 4 : 4M - 8 : 8M - 16 : 16M 9. tRAC(Row Access Time) - Blank : for Daisy Chain Sample -M : 40ns -K : 45ns -G : 53.3ns - B~D, F, J, L, N~ : Reserved 6. Revision - Blank : 1st Gen. -A : 2nd Gen. 10. Speed - DS : for Daisy Chain Sample - 80 : 800Mbps (400MHz) - 70 : 711Mbps (356MHz) - 60 : 600Mbps (300MHz) Rev. 0.9 July 1999 KM416RD8AS Overview The Rambus Direct RDRAM™ is a general purpose highperformance memory device suitable for use in a broad range of applications including computer memory, graphics, video, and any other application where high bandwidth and low latency are required. The 128Mbit Direct Rambus DRAMs (RDRAM®) ar extremely high-speed CMOS DRAMs organized as 8M words by 16 bits. The use of Rambus Signaling Level (RSL) technology permits 800MHz transfer rates while using conventional system and board design technologies. Direct RDRAM devices are capable of sustained data transfers at 1.25 ns per two bytes (10ns per sixteen bytes). The architecture of the Direct RDRAMs allows the highest sustained bandwidth for multiple, simultaneous randomly addressed memory transactions. The separate control and data buses with independent row and column control yield over 95% bus efficiency. The Direct RDRAM's thirty-two banks support up to four simultaneous transactions. System oriented features for mobile, graphics and large memory systems include power management, byte masking. Target Direct RDRAM™ KM4 xx RD8AC SEC KOREA SEC KOREA KM416RD8AS-RK80 Figure 1: Direct RDRAM Consumer CSP Package Key Timing Parameters/Part Numbers Speed Organization Binning 256Kx16x32sa -RM80 -SM80 I/O Freq. MHz 800 800 trac (Row Access Time) ns 40 40 Part Number Features ♦ Highest sustained bandwidth per DRAM device KM416RD8AS-R bM80 KM416RD8AS-ScM80 - 1.6GB/s sustained data transfer rate - Separate control and data buses for maximized efficiency - Separate row and column control buses for easy scheduling and highest performance - 32 banks: four transactions can take place simultaneously at full bandwidth data rates ♦ Low latency features a.The “32s"designation indicates that this RDRAM core is composed of 32 banks which use a "split" bank architecture. b.The “R"designation indicates that this RDRAM core uses Normal Power Self Refresh. c.The “S"designation indicates that this RDRAM core uses Low Power Self Refresh. - Write buffer to reduce read latency - 3 precharge mechanisms for controller flexibility - Interleaved transactions ♦ Advanced power management: - Multiple low power states allows flexibility in powerconsumption versus time to transition to active state - Power-down self-refresh ♦ Organization: 1Kbyte pages and 32 banks, x 16 ♦ Uses Rambus Signaling Level (RSL) for up to 800MHz operation The 128Mbit Direct RDRAMs are offered in a CSP horizontal package suitable for desktop as well as low-profile add-in card and mobile applications. Direct RDRAMs operate from a 2.5 volt supply. Page 1 Rev. 0.9 July 1999 KM416RD8AS Pinouts and Definitions This table shows the pin assignments of the center-bondedforward RDRAM package from the top-side of the package Table 1 : Pin Assignment (Top View) 7 6 5 4 3 2 1 SCK VCMOS NC VSS DQA6 DQA3 VDD DQA1 DQA0 VSS VREF CTMN VSS RQ7 CTM VDD RQ1 RQ4 VSS DQB2 RQ0 VSS DQB6 DQB3 SIO1 VCMOS NC DQA7 VSS CMD DQA4 DQA5 VDD CFM DQA2 VSS CFMN VDDA VSSA RQ5 RQ6 VDD RQ3 RQ2 VSS DQB0 DQB1 VDD DQB4 DQB5 VDD DQB7 VSS SIO0 Target Direct RDRAM™ (the view looking down on the package as it is mounted on the circuit board). A B C D E F G H J Top View Top marking example of Consumer package SEC S E CKOREA KOREA KM416RD8AS-RK80 KM4xxRD8AC Chip For Consumer package, pin #1(ROW 1, COL A) is located at the A1 postion on the top side and the A1 position is marked by the marker “•" Page 2 Rev. 0.9 July 1999 KM416RD8AS Table 2: Pin Description Signal SIO1,SIO0 I/O I/O Type CMOSa # of Pins 2 Description Target Direct RDRAM™ Serial input/output. Pins for reading from and writing .


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