74AC138

74AC125 74ACT125 Quad Buffer with 3-STATE Outputs March 1990 Revised November 1999 74AC125 74ACT125 Quad Buffer with 3-STATE Outputs General Description The AC/ACT125 contains four independent non-inverting buffers with 3-STATE outputs. Features s ICC reduced by 50% s Outputs source/sink 24 mA s ACT125 has TTL-compatible outputs Ordering Code: Order Number 74AC125SC 74AC125SJ 74AC125MTC 74AC125PC 74ACT125SC 74ACT125SJ 74ACT125MTC 74ACT125PC Package Number M14A M14D MTC14 N14A M14A M14D MTC14 N14A Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 14-Lead Plastic Dual-in-Line Package (PDIP), JEDEC MS-001, 0.300” Wide 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 14-Lead Plastic Dual-in-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbol IEEE/IEC Connection Diagram Pin Descriptions Pin Names An, Bn On Description Inputs Outputs Function Table Inputs An L L H H = HIGH Voltage Level L = LOW Voltage Level Z = HIGH Impedance X = Immaterial Output Bn L H X On L H Z FACT is a trademark of Fairchild Semico...