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74F161A

NXP

4-bit binary counter

INTEGRATED CIRCUITS 74F160A*, 74F161A, 74F162A*, 74F163A 4-bit binary counter * Discontinued part. Please see the Disco...


NXP

74F161A

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Description
INTEGRATED CIRCUITS 74F160A*, 74F161A, 74F162A*, 74F163A 4-bit binary counter * Discontinued part. Please see the Discontinued Product List in Section 1, page 21. Product specification IC15 Data Handbook 1996 Jan 29 Philips Semiconductors Philips Semiconductors Product specification 4-bit binary counters 74F161A, 74F163A FEATURES Synchronous counting and loading Two count enable inputs for n-bit cascading Positive edge-triggered clock Asynchronous Master Reset (74F161A) Synchronous Reset (74F163A) High speed synchronous expansion Typical count rate of 130MHz Industrial range (–40°C to +85°C) available DESCRIPTION 4-bit binary counters feature an internal carry look-ahead and can be used for high-speed counting. Synchronous operation is provided by having all flip-flops clocked simultaneously on the positive-going edge of the clock. The clock input is buffered. The outputs of the counters may be preset to High or Low level. A Low level at the Parallel Enable (PE) input disables the counting action and causes the data at the D0–D3 inputs to be loaded into the counter on the positive-going edge of the clock (provided that the setup and hold requirements for PE are met). Preset takes place regardless of the levels at Count Enable (CEP, CET) inputs. A Low level at the Master Reset (MR) input sets all the four outputs of the flip-flops (Q0 – Q3) in 74F161A to Low levels, regardless of the levels at CP, PE, CET and CEP inputs (thus providing an asynchronou...




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