74F113 Dual JK Negative Edge-Triggered Flip-Flop
April 1988 Revised July 1999
74F113 Dual JK Negative Edge-Triggered Flip-Flop
General Description
The 74F113 offers individual J, K, Set and Clock inputs. When the clock goes HIGH the inputs are enabled and data may be entered. The logic level of the J and K inputs may be changed when the clock pulse is HIGH...
