Quad 2-Input AND Gate
54F/74F08 Quad 2-Input AND Gate
54F/74F08
December 1994
54F/74F08 Quad 2-Input AND Gate
General Description
This devi...
Description
54F/74F08 Quad 2-Input AND Gate
54F/74F08
December 1994
54F/74F08 Quad 2-Input AND Gate
General Description
This device contains four independent gates, each of which performs the logic AND function.
Features
n Guaranteed 4000V minimum ESD protection
Ordering Code:
Commercial 74F08PC
See Section 0 Military Package Number N14A 54F08DM (Note 2) J14A M14A M14D 54F08FM (Note 2) 54F08LM (Note 2) W14B E20A 14-Lead (0.300" Wide) Molded Dual-In-Line 14-Lead Ceramic Dual-In-Line 14-Lead (0.150" Wide) Molded Small Outline, JEDEC 14-Lead (0.300" Wide) Molded Small Outline, EIAJ 14-Lead Cerpack 20-Lead Ceramic Leadless Chip Carrier, Type C Package Description
DSXXX
74F08SC (Note 1) 74F08SJ (Note 1)
Note 1: Devices also available in 13" reel. Use suffix = SCX and SJX. Note 2: Military grade device with environmental and burn-in processing. Use suffix = DMQB, FMQB and LMQB.
Logic Symbol
IEEE/IEC
DS009457-3
Connection Diagrams
Pin Assignment for DIP, SOIC and Flatpak Pin Assignment for LCC
DS009457-2
DS009457-1
TRI-STATE ® is a registered trademark of National Semiconductor Corporation.
© 1997 National Semiconductor Corporation
DS009457
www.national.com
1
PrintDate=1997/08/26 PrintTime=15:23:43 9460 ds009457 Rev. No. 1
cmserv
Proof
1
Unit Loading/Fan Out
See Section 0 for U.L. definitions 54F/74F Pin Names An, Bn On Description Inputs Outputs U.L. HIGH/LOW 1.0/1.0 50/33.3 Input IIH/IIL Output IOH/IOL 20 µA/−0.6 mA −1 mA/20 mA
DSXXX
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2
PrintDate=199...
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