74ALVC16841

74ALVC16841 Low Voltage 20-Bit Transparent Latch with 3.6V Tolerant Inputs and Outputs November 2001 Revised November 2001 74ALVC16841 Low Voltage 20-Bit Transparent Latch with 3.6V Tolerant Inputs and Outputs General Description The ALVC16841 contains twenty non-inverting latches with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. The flip-flops appear transparent to the data when the Latch enable (LE) is HIGH. When LE is LOW, the data that meets the setup time is latched. Data appears on the bus when the Output Enable (OE) is LOW. When OE is HIGH, the outputs are in a high impedance state. The 74ALVC16841 is designed for low voltage (1.65V to 3.6V) VCC applications with I/O compatibility up to 3.6V. The 74ALVC16841 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining low CMOS power dissipation. Features I 1.65V–3.6V VCC supply operation I 3.6V tolerant inputs and outputs I tPD (Dn to On) 3.5 ns max for 3.0V to 3.6V VCC 3.9 ns max for 2.3V to 2.7V VCC 6.8 ns max for 1.65V to 1.95V VCC I Power-off high impedance inputs and outputs I Supports live insertion and withdrawal (Note 1) I Uses patented noise/EMI reduction circuitry I Latchup conforms to JEDEC JED78 I ESD performance: Human body model > 2000V Machine model > 200V Note 1: To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pull-up resistor; the minimum value of the resistor is ...