74AHCT1G00

INTEGRATED CIRCUITS DATA SHEET 74AHC1G00; 74AHCT1G00 2-input NAND gate Product specification Supersedes data of 1998 Nov 25 File under Integrated Circuits, IC06 1999 Jan 27 Philips Semiconductors Product specification 2-input NAND gate FEATURES Symmetrical output impedance High noise immunity ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V Low power dissipation Balanced propagation delays Very small 5-pin package Output capability: standard. DESCRIPTION The 74AHC1G/AHCT1G00 is a high-speed Si-gate CMOS device. The 74AHC1G/AHCT1G00 provides the 2-input NAND function. FUNCTION TABLE See note 1. INPUTS inA L L H H Note 1. H = HIGH voltage level. L = LOW voltage level. ORDERING AND PACKAGE INFORMATION inB L H L H OUTPUT outY H H H L Notes 74AHC1G00; 74AHCT1G00 QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf ≤ 3.0 ns. TYPICAL SYMBOL tPHL/tPLH CI CPD PARAMETER propagation delay inA, inB to outY input capacitance power dissipation capacitance CONDITIONS AHC1G CL = 15 pF VCC = 5 V 3.5 1.5 notes 1 and 2; 17 CL = 50 pF; f = 1 MHz AHCT1G 3.6 1.5 18 ns pF pF UNIT 1. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi + (CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V. 2. The condition is VI = GND to VCC. PINNING PIN 1 2 3 4 5 inB inA GND outY VCC SYMBOL data input data input ground (0 V) data o...