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74ACTQ16543 Dataheets PDF



Part Number 74ACTQ16543
Manufacturers Fairchild Semiconductor
Logo Fairchild Semiconductor
Description 16-Bit Registered Transceiver
Datasheet 74ACTQ16543 Datasheet74ACTQ16543 Datasheet (PDF)

74ACTQ16543 16-Bit Registered Transceiver with 3-STATE Outputs December 1991 Revised December 1998 74ACTQ16543 16-Bit Registered Transceiver with 3-STATE Outputs General Description The ACTQ16543 contains sixteen non-inverting transceivers containing two sets of D-type registers for temporary storage of data flowing in either direction. Each byte has separate control inputs which can be shorted together for full 16-bit operation. Separate Latch Enable and Output Enable inputs are provided for .

  74ACTQ16543   74ACTQ16543



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74ACTQ16543 16-Bit Registered Transceiver with 3-STATE Outputs December 1991 Revised December 1998 74ACTQ16543 16-Bit Registered Transceiver with 3-STATE Outputs General Description The ACTQ16543 contains sixteen non-inverting transceivers containing two sets of D-type registers for temporary storage of data flowing in either direction. Each byte has separate control inputs which can be shorted together for full 16-bit operation. Separate Latch Enable and Output Enable inputs are provided for each register to permit independent input and output control in either direction of data flow. The ACTQ16543 utilizes Fairchild Quiet Series™ technology to guarantee quiet output switching and improved dynamic threshold performance. FACT Quiet Series™ features GTO™ output control and undershoot corrector for superior performance. Features s Utilizes Fairchild FACT Quiet Series technology s Guaranteed simultaneous switching noise level and dynamic threshold performance s Guaranteed pin-to-pin output skew s Independent registers for A and B buses s Separate controls for data flow in each direction s Back-to-back registers for storage Multiplexed real-time and stored data transfers s Separate control logic for each byte s 16-bit version of the ACTQ543 s Outputs source/sink 24 mA s Additional specs for Multiple Output Switching s Output loading specs for both 50 pF and 250pF loads Ordering Code: Order Number 74ACTQ16543SSC 74ACTQ16543MTD Package Number MS56A MTD56 Package Description 56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300” Wide 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbol Pin Descriptions Pin Names OEABn OEBAn CEABn CEBAn LEABn LEBAn A0–A15 B0–B15 Descriptions A-to-B Output Enable Input (Active LOW) B-to-A Output Enable Input (Active LOW) A-to-B Enable Input (Active LOW) B-to-A Enable Input (Active LOW) A-to-B Latch Enable Input (Active LOW) B-to-A Latch Enable Input (Active LOW) A-to-B Data Inputs or B-to-A 3-STATE Outputs B-to-A Data Inputs or A-to-B 3-STATE Outputs FACT™, Quiet Series™, FACT Quiet Series™ and GTO™ are trademarks of Fairchild Semiconductor Corporation. © 1999 Fairchild Semiconductor Corporation DS010967.prf www.fairchildsemi.com 74ACTQ16543 Connection Diagram Pin Assignment for SSOP and TSSOP Functional Description The ACTQ16543 contains sixteen non-inverting transceivers with 3-STATE outputs. The device is byte controlled with each byte functioning identically, but independent of the other. The control pins may be shorted together to obtain full 16-bit operation. The following description applies to each byte. For data flow from A to B, for example, the A-to-B Enable (CEABn) input must be LOW in order to enter data from A0–A15 or take data from B0–B15, as indicated in the Data I/O Control Table. With CEABn LOW, a LOW signal on the A-to-B Latch Enable (LEABn) in.


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