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2SC4617 Dataheets PDF



Part Number 2SC4617
Manufacturers Motorola Inc
Logo Motorola  Inc
Description NPN TRANSISTOR
Datasheet 2SC4617 Datasheet2SC4617 Datasheet (PDF)

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by 2SC4617/D Preliminary Information NPN Silicon General Purpose Amplifier Transistor This NPN transistor is designed for general purpose amplifier applications. This device is housed in the SOT-416/SC–90 package which is designed for low power surface mount applications, where board space is at a premium. • Reduces Board Space • High hFE, 210 – 460 (typical) • Low VCE(sat), < 0.5 V • Available in 8 mm, 7-inch/3000 Unit Tape and Reel .

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MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by 2SC4617/D Preliminary Information NPN Silicon General Purpose Amplifier Transistor This NPN transistor is designed for general purpose amplifier applications. This device is housed in the SOT-416/SC–90 package which is designed for low power surface mount applications, where board space is at a premium. • Reduces Board Space • High hFE, 210 – 460 (typical) • Low VCE(sat), < 0.5 V • Available in 8 mm, 7-inch/3000 Unit Tape and Reel MAXIMUM RATINGS (TA = 25°C) Rating Collector-Base Voltage Collector-Emitter Voltage Emitter-Base Voltage Collector Current — Continuous Symbol V(BR)CBO V(BR)CEO V(BR)EBO IC Value 50 50 5.0 100 Unit Vdc Vdc Vdc mAdc 2SC4617 NPN GENERAL PURPOSE AMPLIFIER TRANSISTORS SURFACE MOUNT 3 2 1 CASE 463–01, STYLE 1 SOT–416/SC–90 DEVICE MARKING 2SC4617 = B9 COLLECTOR 3 THERMAL CHARACTERISTICS Rating Power Dissipation(1) Junction Temperature Storage Temperature Range Symbol PD TJ Tstg Max 125 150 – 55 ~ + 150 Unit mW °C °C 1 BASE 2 EMITTER ELECTRICAL CHARACTERISTICS (TA = 25°C) Characteristic Collector-Base Breakdown Voltage (IC = 50 µAdc, IE = 0) Collector-Emitter Breakdown Voltage (IC = 1.0 mAdc, IB = 0) Emitter-Base Breakdown Voltage (IE = 50 µAdc, IE = 0) Collector-Base Cutoff Current (VCB = 30 Vdc, IE = 0) Emitter-Base Cutoff Current (VEB = 4.0 Vdc, IB = 0) Collector-Emitter Saturation Voltage(2) (IC = 60 mAdc, IB = 5.0 mAdc) DC Current Gain(2) (VCE = 6.0 Vdc, IC = 1.0 mAdc) Transition Frequency (VCE = 12 Vdc, IC = 2.0 mAdc, f = 30 MHz) Output Capacitance (VCB = 12 Vdc, IC = 0 Adc, f = 1 MHz) Symbol V(BR)CBO V(BR)CEO V(BR)EBO ICBO IEBO VCE(sat) — hFE 120 fT COB — — — 180 2.0 560 — — MHz pF — 0.4 — Min 50 50 5.0 — — Typ — — — — — Max — — — 0.5 0.5 Unit Vdc Vdc Vdc µA µA Vdc 1. Device mounted on a FR-4 glass epoxy printed circuit board using the minimum recommended footprint. 2. Pulse Test: Pulse Width ≤ 300 µs, D.C. ≤ 2%. This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice. Thermal Clad is a trademark of the Bergquist Company Motorola Small–Signal Transistors, FETs and Diodes Device Data © Motorola, Inc. 1996 1 2SC4617 TYPICAL ELECTRICAL CHARACTERISTICS 60 TA = 25°C IC, COLLECTOR CURRENT (mA) 50 40 30 20 10 0 160 µA 140 µA DC CURRENT GAIN 120 µA 100 µA 80 µA 60 µA 40 µA IB = 20 µA 0 2 4 6 VCE, COLLECTOR VOLTAGE (V) 8 10 0.1 1 10 100 IC, COLLECTOR CURRENT (mA) TA = 75°C TA = – 25°C 100 1000 TA = 25°C VCE = 10 V Figure 1. IC – VCE 2 VCE , COLLECTOR-EMITTER VOLTAGE (V) TA = 25°C COLLECTOR VOLTAGE (mV) 1.5 900 800 700 600 500 400 300 200 100 0 0.01 0.1 1 IB, BASE CURRENT (mA) 10 100 0 0.2 0.5 1 Figure 2. DC Current Gain 1 0.5 TA = 25°C VCE = 5 V 5 10 20 40 60 80 100 150 200 IC, COLLECTOR CURRENT (mA) Figure 3. Collector Saturation Region 20 7 6 Cob, CAPACITANCE (pF) 5 4 3 2 1 Figure 4. On Voltage Cib, INPUT CAPACITANCE (pF) 18 16 14 12 10 0 1 2 VEB (V) 3 4 0 10 20 VCB (V) 30 40 Figure 5. Capacitance Figure 6. Capacitance 2 Motorola Small–Signal Transistors, FETs and Diodes Device Data 2SC4617 MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to insure proper solder connection interface between the board and the package. With the correct pad geometry, the packages will self align when subjected to a solder reflow process. TYPICAL SOLDERING PATTERN Unit: mm 0.5 min. (3x) ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ 0.5 min. (3x) 1.4 0.5 1 SOT–416/SC–90 POWER DISSIPATION The power dissipation of the SOT–416/SC–90 is a function of the pad size. This can vary from the minimum pad size for soldering to the pad size given for maximum power dissipation. Power dissipation for a surface mount device is determined by TJ(max), the maximum rated junction temperature of the die, RθJA, the thermal resistance from the device junction to ambient; and the operating temperature, TA. Using the values provided on the data sheet, PD can be calculated as follows. PD = TJ(max) – TA RθJA the equation for an ambient temperature TA of 25°C, one can calculate the power dissipation of the device which in this case is 125 milliwatts. PD = 150°C – 25°C 1000°C/W = 125 milliwatts The values for the equation are found in the maximum ratings table on the data sheet. Substituting these values into The 1000°C/W assumes the use of the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 125 milliwatts. Another alternative would be to use a ceramic substrate or an aluminum core board such as Thermal Clad™. Using a board material such as Thermal Clad, a higher power dissipation can be achieved using the same footprint. SOLDERING PRECAUTIONS The melting temperature of solder is higher than the rated temperature of the device. When the en.


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