HY62V8200B Series 256Kx8bit CMOS SRAM
HY62V8200B Series
256Kx8bit CMOS SRAM
Document Title
256K x8 bit 3.3V Low Power CMOS slow SRAM
Revision History
Revisi...
Description
HY62V8200B Series
256Kx8bit CMOS SRAM
Document Title
256K x8 bit 3.3V Low Power CMOS slow SRAM
Revision History
Revision No 03 History Initial Revision History Insert Revised - Improved operating current Icc1 : 60mA -> 35mA Change the Notch Location of sTSOP - Left-Top => Left-Center Marking Information Add Revised - AC Test Condition Add : 5pF Test Load Changed Logo - HYUNDAI -> hynix - Marking Information Change Draft Date Jul.29.2000 Remark Final
04
Sep.04.2000
Final
05
Dec.04.2000
Final
06
Apr.30.2001
Final
This document is a general product description and is subject to change without notice. Hynix Electronics does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev 06 / Apr. 2001 Hynix Semiconductor
Y62V8200B Series
DESCRIPTION
The HY62V8200B is a high speed, low power and 2M bit CMOS SRAM organized as 262,144 words by 8bit. The HY62V8200B uses high performance CMOS process technology and designed for high speed low power circuit technology. It is particularly well suited for used in high density low power system application. This device has a data retention mode that guarantees data to remain valid at a minimum power supply voltage of 2.0V.
FEATURES
Fully static operation and Tri-state output TTL compatible inputs and outputs Battery backup( LL-part ) -. 2.0V(min) data retention Standard pin configuration -. 32-sTSOPI-8X13.4, 32-TSOPI -8X20 (Standard and Reversed)
Product Voltage Speed Operation No. (V) (ns) ...
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