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AX88796L Dataheets PDF



Part Number AX88796L
Manufacturers ETC
Logo ETC
Description 3-in-1 Local Bus Fast Ethernet Controller
Datasheet AX88796L DatasheetAX88796L Datasheet (PDF)

AX88796 L 3-in-1 Local Bus Fast Ethernet Controller 10/100BASE 3-in-1 Local CPU Bus Fast Ethernet Controller with Embedded SRAM Document No.: AX796-17 / V1.7 / Jan. 25 ’02 Features • • • • • • • • • • Highly integrated with embedded 10/100Mbps MAC, PHY and Transceiver Embedded 8K * 16 bit SRAM Compliant with IEEE 802.3/802.3u 100BASE-TX/FX specification NE2000 register level compatible instruction Single chip local CPU bus 10/100Mbps Fast Ethernet MAC Controller Support both 8 bit and 16 bit lo.

  AX88796L   AX88796L


Document
AX88796 L 3-in-1 Local Bus Fast Ethernet Controller 10/100BASE 3-in-1 Local CPU Bus Fast Ethernet Controller with Embedded SRAM Document No.: AX796-17 / V1.7 / Jan. 25 ’02 Features • • • • • • • • • • Highly integrated with embedded 10/100Mbps MAC, PHY and Transceiver Embedded 8K * 16 bit SRAM Compliant with IEEE 802.3/802.3u 100BASE-TX/FX specification NE2000 register level compatible instruction Single chip local CPU bus 10/100Mbps Fast Ethernet MAC Controller Support both 8 bit and 16 bit local CPU interfaces include MCS-51 series, 80186 series and MC68K series CPU Support both 10Mbps and 100Mbps data rate Support both full-duplex or half-duplex operation Provides an extra MII port for supporting other media. For example, Home LAN application Support EEPROM interface to store MAC address • • • • • • External and internal loop-back capability Support Standard Print Port for printer server application Support upto 3/1 General Purpose In/Out pins 128-pin LQFP low profile package Low Power Consumption, typical under 100mA 0.25 Micron low power CMOS process. 25MHz Operation, Pure 3.3V operation with 5V I/O tolerance. *IEEE is a registered trademark of the Institute of Electrical and Electronic Engineers, Inc. *All other trademarks and registered trademark are the property of their respective holders. Product description The AX88796 Fast Ethernet Controller is a high performance and highly integrated local CPU bus Ethernet Controller with embedded 10/100Mbps PHY/Transceiver and 8K*16 bit SRAM. The AX88796 supports both 8 bit and 16 bit local CPU interfaces include MCS-51 series, 80186 series, MC68K series CPU and ISA bus. The AX88796 implements both 10Mbps and 100Mbps Ethernet function based on IEEE802.3 / IEEE802.3u LAN standard. The AX88796 also provides an extra IEEE802.3u compliant media-independent interface (MII) to support other media applications. Using MII interface, Home LAN PHY type media can be supported. As well as, the chip also provides optional Standard Print Port ( parallel port interface ), can be used for printer server device or treat as simple general I/O port. The chip also support upto 3/1 additional General Purpose In/Out pins System Block Diagram AD BUS Optional Print Port Or General I/O Ports Addr L Optional Home LAN PHY AX88796 With 10/100 Mbps PHY/TxRx RJ45 LATCH RJ11 This data sheet contains new products information. ASIX ELECTRONICS reserves the rights to modify product specification without notice. No liability is assumed as a result of the use of this product. No rights under any patent accompany the sale of the product. ASIX ELECTRONICS CORPORATION 2F, NO.13, Industry East Rd. II, Science-based Industrial Park, Hsin-Chu City, Taiwan, R.O.C. TEL: 886-3-579-9500 FAX: 886-3-579-9558 8051 CPU Addr H Ctl BUS Always contact ASIX for possible updates before starting a design. First Released Date : July/31/2000 http://www.asix.com.tw AX88796 L 3-in-1 Local Bus Fast Ethernet Controller CONTENTS 1.0 INTRODUCTION .............................................................................................................................................. 5 1.1 GENERAL DESCRIPTION:..................................................................................................................................... 5 1.2 AX88796 BLOCK DIAGRAM: .............................................................................................................................. 5 1.3A AX88796 PIN CONNECTION DIAGRAM.............................................................................................................. 6 1.3B AX88796 PIN CONNECTION DIAGRAM WITH SPP PORT OPTION ........................................................................ 7 1.3.1 AX88796 Pin Connection Diagram for ISA Bus Mode................................................................................ 8 1.3.2 AX88796 Pin Connection Diagram for 80x86 Mode................................................................................... 9 1.3.3 AX88796 Pin Connection Diagram for MC68K Mode .............................................................................. 10 1.3.4 AX88796 Pin Connection Diagram for MCS-51 Mode ............................................................................. 11 2.0 SIGNAL DESCRIPTION ................................................................................................................................. 12 2.1 LOCAL CPU BUS INTERFACE SIGNALS GROUP ................................................................................................... 12 2.2 10/100MBPS TWISTED-PAIR INTERFACE PINS GROUP ......................................................................................... 13 2.3 BUILT-IN PHY LED INDICATOR PINS GROUP ..................................................................................................... 13 2.4 EEPROM SIGNALS GROUP .....................................................................................................


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