Revised March 2000
Hex Inverting Gates
This device contains six independent gates each of which
performs the logic INVERT function.
Order Number Package Number
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
H = HIGH Logic Level
L = LOW Logic Level
© 2000 Fairchild Semiconductor Corporation DS006345