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DM74AS373 Dataheets PDF



Part Number DM74AS373
Manufacturers Fairchild Semiconductor
Logo Fairchild Semiconductor
Description Octal D-Type Transparent Latch with 3-STATE Outputs
Datasheet DM74AS373 DatasheetDM74AS373 Datasheet (PDF)

DM74AS373 Octal D-Type Transparent Latch with 3-STATE Outputs April 1984 Revised March 2000 DM74AS373 Octal D-Type Transparent Latch with 3-STATE Outputs General Description These 8-bit registers feature totem-pole 3-STATE outputs designed specifically for driving highly-capacitive or relatively low-impedance loads. The high-impedance state and increased high-logic-level drive provide these registers with the capability of being connected directly to and driving the bus lines in a bus-organize.

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DM74AS373 Octal D-Type Transparent Latch with 3-STATE Outputs April 1984 Revised March 2000 DM74AS373 Octal D-Type Transparent Latch with 3-STATE Outputs General Description These 8-bit registers feature totem-pole 3-STATE outputs designed specifically for driving highly-capacitive or relatively low-impedance loads. The high-impedance state and increased high-logic-level drive provide these registers with the capability of being connected directly to and driving the bus lines in a bus-organized system without need for interface or pull-up components. They are particularly attractive for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The eight latches of the DM74AS373 are transparent Dtype latches, meaning that while the enable (G) is HIGH the Q outputs will follow the data (D) inputs. When the enable is taken LOW the output will be latched at the level of the data that was set up. A buffered output control input can be used to place the eight outputs in either a normal logic state (HIGH or LOW logic levels) or a high impedance state. In the high-impedance state the outputs neither load nor drive the bus lines significantly. The output control does not affect the internal operation of the latches. That is, the old data can be retained or new data can be entered even while the outputs are OFF. Features s Switching specifications at 50 pF s Switching specifications guaranteed over full temperature and VCC range s Advanced oxide-isolated, ion-implanted Schottky TTL process s Functionally and pin for pin compatible with LS and ALS TTL counterparts s Improved AC performance over LS and ALS TTL counterparts s 3-STATE buffer-type outputs drive bus lines directly Ordering Code: Order Number DM74AS373WM DM74AS373N Package Number M20B N20A Package Description 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram © 2000 Fairchild Semiconductor Corporation DS006309 www.fairchildsemi.com DM74AS373 Logic Diagram Function Table Output Control L L L H L = LOW State H = HIGH State X = Don’t Care Z = High Impedance State Q0 = Previous Condition of Q Enable G H H L X D H L X X Output Q H L Q0 Z www.fairchildsemi.com 2 DM74AS373 Absolute Maximum Ratings(Note 1) Supply Voltage Input Voltage Voltage Applied to Disabled Output Operating Free Air Temperature Range Storage Temperature Range Typical θJA N Package M Package 52.5°C/W 70.5°C/W 7V 7V 5.5V 0°C to +70°C −65°C to +150°C Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Recommended Operating Conditions Symbol VCC VIH VIL IOH IOL tW tSU tH TA Supply Voltage HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Current LOW Level Output Current Width of Enable Pulse, HIGH Data Setup Time (Note 2) Data Hold Time (Note 2) Free Air Operating Temperature 4.5 2↓ 3↓ 0 70 Parameter Min 4.5 2 0.8 −15 48 Nom 5 Max 5.5 Units V V V mA mA ns ns ns °C Note 2: The (↓) arrow indicates the negative edge of the enable is used for reference. Electrical Characteristics over recommended operating free air temperature range. All typical values are measured at VCC = 5V, TA = 25°C. Symbol VIK VOH VOL II IIH IIL IO IOZH IOZL ICC Parameter Input Clamp Voltage HIGH Level Output Voltage LOW Level Output Voltage Input Current at Max Input Voltage HIGH Level Input Current LOW Level Input Current Output Drive Current OFF-State Output Current with HIGH Level Voltage Applied OFF-State Output Current with LOW Level Voltage Applied Supply Current VCC = 5.5V Outputs Open Outputs HIGH Outputs LOW Outputs Disabled 55 55 65 90 85 100 mA VCC = 5.5V, VO = 0.4V −50 µA Conditions VCC = 4.5V, II = −18 mA VCC = 4.5V, IOH = Max IOH = −2 mA, VCC = 4.5V to 5.5V VCC = 4.5V, IOL = Max VCC = 5.5V, VIH = 7V VCC = 5.5V, VIH = 2.7V VCC = 5.5V, VIL = 0.4V VCC = 5.5V, VO = 2.25V VCC = 5.5V, VO = 2.7V −30 2.4 VCC − 2 0.35 0.5 0.1 20 −0.5 −112 50 3.2 Min Typ Max −1.2 Units V V V mA µA mA mA µA 3 www.fairchildsemi.com DM74AS373 Switching Characteristics over recommended operating free air temperature range Symbol tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ Parameter Propagation Delay Time LOW-to-HIGH Level Output Propagation Delay Time HIGH-to-LOW Level Output Propagation Delay Time LOW-to-HIGH Level Output Propagation Delay Time HIGH-to-LOW Level Output Output Enable Time to HIGH Level Output Output Enable Time to LOW Level Output Output Disable Time from HIGH Level Output Output Disable Time from LOW Level Out.


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