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DM74AS280 Dataheets PDF



Part Number DM74AS280
Manufacturers Fairchild Semiconductor
Logo Fairchild Semiconductor
Description 9-Bit Parity Generator/Checker
Datasheet DM74AS280 DatasheetDM74AS280 Datasheet (PDF)

DM74AS280 9-Bit Parity Generator/Checker October 1986 Revised March 2000 DM74AS280 9-Bit Parity Generator/Checker General Description These universal, 9-bit parity generators/checkers utilize advanced Schottky high performance circuitry and feature odd/even outputs to facilitate operation of either odd or even parity applications. The word length capability is easily expanded by cascading. The DM74AS280 can be used to upgrade the performance of most systems utilizing the ’180 parity generator/.

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DM74AS280 9-Bit Parity Generator/Checker October 1986 Revised March 2000 DM74AS280 9-Bit Parity Generator/Checker General Description These universal, 9-bit parity generators/checkers utilize advanced Schottky high performance circuitry and feature odd/even outputs to facilitate operation of either odd or even parity applications. The word length capability is easily expanded by cascading. The DM74AS280 can be used to upgrade the performance of most systems utilizing the ’180 parity generator/checker. Although the DM74AS280 is implemented without expander inputs, the corresponding function is provided by the availability of an input at pin 4 and no internal connection at pin 3. This permits the DM74AS280 to be substituted for the ’180 in existing designs to produce identical function even if DM74AS280s are mixed with existing ’180s. Features s Generates either odd or even parity for nine data lines s Inputs are buffered to lower the drive requirements s Can be used to upgrade existing systems using MSI parity circuits s Cascadable for N-bits s Advanced oxide-isolated, ion-implanted Schottky TTL process s Switching specifications at 50 pF s Switching specifications guaranteed over full temperature and VCC range Ordering Code: Order Number DM74AS280M DM74AS280N Package Number M14A N14A Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Function Table Number of Inputs (A thru I) that are HIGH 0, 2, 4, 6, 8 1, 3, 5, 7, 9 L = LOW State H = HIGH State Outputs ∑Even H L ∑Odd L H © 2000 Fairchild Semiconductor Corporation DS006303 www.fairchildsemi.com DM74AS280 Logic Diagram www.fairchildsemi.com 2 DM74AS280 Absolute Maximum Ratings(Note 1) Supply Voltage Input Voltage Operating Free Air Temperature Range Storage Temperature Range Typical θJA N Package M Package 77.0°C/W 108.0°C/W 7V 7V 0°C to +70°C −65°C to +150°C Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Recommended Operating Conditions Symbol VCC VIH VIL IOH IOL TA Supply Voltage HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Current LOW Level Output Current Free-Air Operating Temperature 0 Parameter Min 4.5 2 0.8 −2 20 70 Typ 5 Max 5.5 Units V V V mA mA °C Electrical Characteristics Over recommended free-air temperature range. All typical values are measured at VCC = 5V, TA = 25°C. Symbol VIK VOH VOL II IIH IIL IO ICC Parameter Input Clamp Voltage HIGH Level Output Voltage LOW Level .


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