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DM74ALS652

Fairchild Semiconductor

Octal 3-STATE Bus Transceiver and Register

DM74ALS652 Octal 3-STATE Bus Transceiver and Register October 1986 Revised March 2000 DM74ALS652 Octal 3-STATE Bus Tra...


Fairchild Semiconductor

DM74ALS652

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Description
DM74ALS652 Octal 3-STATE Bus Transceiver and Register October 1986 Revised March 2000 DM74ALS652 Octal 3-STATE Bus Transceiver and Register General Description This device incorporates an octal transceiver and an octal D-type register configured to enable transmission of data from bus to bus or internal register to bus. This bus transceiver features totem-pole 3-STATE outputs designed specifically for driving highly-capacitive or relatively low-impedance loads. The high-impedance state and increased high level logic drive provide this device with the capability of being connected directly to and driving the bus lines in a bus organized system without need for interface or pull-up components. They are particularly attractive for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The registers in the DM74ALS652 are edge-triggered Dtype flip-flops. On the positive transition of the clock (CAB or CBA), the input data is stored into the appropriate register. The CAB input controls the transfer of data into the A register and the CBA input controls the B register. The SAB and SBA control pins are provided to select whether real-time data or stored data is transferred. A LOW input level selects real-time data and a HIGH level selects stored data. The select controls have a “make before break” configuration to eliminate a glitch which would normally occur in a typical multiplexer during the transition between stored and real-time data. The e...




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