DM74ALS09

DM74ALS09 Quad 2-Input AND Gate with Open Collector Outputs September 1986 Revised February 2000 DM74ALS09 Quad 2-Input AND Gate with Open Collector Outputs General Description This device contains four independent gates, each of which performs the logic AND function. The open-collector outputs require external pull-up resistors for proper logical operation. Pull-Up Resistor Equations Features s Switching specifications at 50 pF s Switching specifications guaranteed over full temperature and VCC range s Advanced oxide-isolated, ion-implanted Schottky TTL process s Functionally and pin for pin compatible with Schottky and low power Schottky TTL counterpart s Improved AC performance over Schottky and low power Schottky counterparts Where: N1 (IOH) = total maximum output HIGH current for all outputs tied to pull-up resistor N2 (IIH) = total maximum input HIGH current for all inputs tied to pull-up resistor N3 (IIL) = total maximum input LOW current for all inputs tied to pull-up resistor Ordering Code: Order Number DM74ALS09M DM74ALS09N Package Number M14A N14A Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Function Table Y = AB Inputs A L L H H H = HIGH Logic Level L = LOW Logic Level Output B L H L H Y L L L H © 2000 Fairchild...