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DM54LS469 Dataheets PDF



Part Number DM54LS469
Manufacturers National Semiconductor
Logo National Semiconductor
Description DM54LS469/DM74LS469 8-Bit Up/Down Counter
Datasheet DM54LS469 DatasheetDM54LS469 Datasheet (PDF)

DM54LS469 DM74LS469 8-Bit Up Down Counter July 1989 DM54LS469 DM74LS469 8-Bit Up Down Counter General Description The ‘LS469 is an 8-bit synchronous up down counter with parallel load and hold capability Three function-select inputs (LD UD CBI) provide one of four operations which occur synchronously on the rising edge of the clock (CK) The LOAD operation loads the inputs (D7 – D0) into the output register (Q7 – Q0) The HOLD operation holds the previous value regardless of clock transitions Th.

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DM54LS469 DM74LS469 8-Bit Up Down Counter July 1989 DM54LS469 DM74LS469 8-Bit Up Down Counter General Description The ‘LS469 is an 8-bit synchronous up down counter with parallel load and hold capability Three function-select inputs (LD UD CBI) provide one of four operations which occur synchronously on the rising edge of the clock (CK) The LOAD operation loads the inputs (D7 – D0) into the output register (Q7 – Q0) The HOLD operation holds the previous value regardless of clock transitions The INCREMENT operation adds one to the output register when the carry-in input is TRUE (CBI e LOW) otherwise the operation is a HOLD The carry-out (CBO) is TRUE (CBO e LOW) when the output register (Q7 – Q0) is all HIGHs otherwise FALSE (CBO e HIGH) The DECREMENT operation subtracts one from the output register when the borrow-in input is TRUE (CBI e LOW) otherwise the operation is a HOLD The borrow-out (CBO) is TRUE (CBO e LOW) when the output register (Q7 – Q0) is all LOWs otherwise FALSE (CBO e HIGH) The output register (Q7 –Q0) is enabled when OE is LOW and disabled (HI-Z) when OE is HIGH The output drivers will sink the 24 mA required for many bus-interface standards Two or more ‘LS469 octal up down counters may be cascaded to provide larger counters Features Benefits Y Y Y Y Y Y Y 8-bit up down counter for microprogram-counter DMA controller and general-purpose counting applications 8 bits matches byte boundaries Bus-structured pinout 24-pin SKINNYDIP saves space TRI-STATE outputs drive bus lines Low current PNP inputs reduce loading Expandable in 8-bit increments Connection Diagram Top View Standard Test Load TL L 8333 – 3 TL L 8333 – 1 Order Number DM54LS469J DM74LS469J or DM74LS469N See NS Package Number J24F or N24C Function Table OE CK LD UD CBI D7 – D0 H L L L L L X Q7 – Q0 Operation X L H H H H X X L L H H X X H L H L X D X X X X Z HI-Z D LOAD Q HOLD Q plus 1 INCREMENT Q HOLD Q minus 1 DECREMENT u u u u u TRI-STATE is a registered trademark of National Semiconductor Corp C1995 National Semiconductor Corporation TL L 8333 RRD-B30M115 Printed in U S A Absolute Maximum Ratings If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Supply Voltage VCC Input Voltage 7V 5 5V Off-State Output Voltage Storage Temperature 5 5V b 65 C to a 150 C Operating Conditions Symbol VCC TA tW tSU th Supply Voltage Operating Free-Air Temperature Width of Clock Set Up Time Hold Time Low High Parameter Min 45 b 55 Military Typ 5 Max 55 125 Min 4 75 0 35 25 50 b 15 Commercial Typ 5 Max 5 25 75 10 Units V C ns 40 30 60 0 ns b 15 0 Case Temperature Electrical Characteristics Over Operating Conditions Symbol VIL VIH VIC IIL IIH II VOL Parameter Low-Level Input Voltage High-Level Input Voltage Input Clamp Voltage Low-Level Input Current High-Level Input Current Maximum Input Current Low-Level Output Voltage VCC e MIN VCC e MAX VCC e MAX VCC e MAX VCC e .


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