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DM54LS259 Dataheets PDF



Part Number DM54LS259
Manufacturers National Semiconductor
Logo National Semiconductor
Description 8-Bit Addressable Latches
Datasheet DM54LS259 DatasheetDM54LS259 Datasheet (PDF)

DM54LS259 DM74LS259 8-Bit Addressable Latches May 1992 DM54LS259 DM74LS259 8-Bit Addressable Latches General Description These 8-bit addressable latches are designed for general purpose storage applications in digital systems Specific uses include working registers serial-holding registers and active-high decoders or demultiplexers They are multifunctional devices capable of storing single-line data in eight addressable latches and being a 1-of-8 decoder or demultiplexer with active-high outpu.

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DM54LS259 DM74LS259 8-Bit Addressable Latches May 1992 DM54LS259 DM74LS259 8-Bit Addressable Latches General Description These 8-bit addressable latches are designed for general purpose storage applications in digital systems Specific uses include working registers serial-holding registers and active-high decoders or demultiplexers They are multifunctional devices capable of storing single-line data in eight addressable latches and being a 1-of-8 decoder or demultiplexer with active-high outputs Four distinct modes of operation are selectable by controlling the clear and enable inputs as enumerated in the function table In the addressable-latch mode data at the datain terminal is written into the addressed latch The addressed latch will follow the data input with all unaddressed latches remaining in their previous states In the memory mode all latches remain in their previous states and are unaffected by the data or address inputs To eliminate the possibility of entering erroneous data in the latches the enable should be held high (inactive) while the address lines are changing In the 1-of-8 decoding or demultiplexing mode the addressed output will follow the level of the D input with all other outputs low In the clear mode all outputs are low and unaffected by the address and data inputs Features Y Y Y Y Y Y Y Y Y Y 8-Bit parallel-out storage register performs serial-to-parallel conversion with storage Asynchronous parallel clear Active high decoder Enable disable input simplifies expansion Direct replacement for Fairchild 9334 Expandable for N-bit applications Four distinct functional modes Typical propagation delay times Enable-to-output 18 ns Data-to-output 16 ns Address-to-output 21 ns Clear-to-output 17 ns Fan-out IOL (sink current) 54LS259 4 mA 74LS259 8 mA IOH (source current) b0 4 mA Typical ICC 22 mA Connection Diagram Dual-In-Line Package Function Table Inputs Clear H H L L E L H L H Output of Addressed Latch D Qi0 D L Each Other Output Qi0 Qi0 L L Function Addressable Latch Memory 8-Line Demultiplexer Clear Latch Selection Table Select Inputs C L L L L H H H H B L L H H L L H H A L H L H L H L H Latch Addressed 0 1 2 3 4 5 6 7 TL F 6418 – 1 Order Number DM54LS259E DM54LS259J DM54LS259W DM74LS259M DM74LS259WM or DM74LS259N See NS Package Number E20A J16A M16A M16B N16E or W16A H e High Level L e Low Level D e the Level of the Data Input Qi0 e the Level of Qi (i e 0 1 7 as Appropriate) before the Indicated Steady-State Input Conditions Were Established C1995 National Semiconductor Corporation TL F 6418 RRD-B30M105 Printed in U S A Absolute Maximum Ratings (Note) If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Supply Voltage 7V Input Voltage 7V Operating Free Air Temperature Range b 55 C to a 125 C DM54 DM74LS 0 C to a 70 C Storage Temperature Range b 65 C to a 150 C Note The ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed The device should not be operated at these limits The parametric values defined in the ‘‘Electrical Characteristics’’ table are not guaranteed at the absolute maximum ratings The ‘‘Recommended Operating Conditions’’ table will define the conditions for actual device operation Recommended Operating Conditions Symbol VCC VIH VIL IOH IOL tW tSU tH TA Parameter Min Supply Voltage High Level Input Voltage Low Level Input Voltage High Level Output Current Low Level Output Current Pulse Width (Note 7) Setup Time (Notes 1 2 3 Hold Time (Notes 1 2 7) 7) Enable Clear Data Select Data Select 17 17 20u 15v 5u 0u b 55 DM54LS259 Nom 5 Max 55 07 b0 4 DM74LS259 Min 4 75 2 08 b0 4 Units Max 5 25 V V V mA mA ns ns ns 70 C Nom 5 45 2 4 15 15 15u 15v 2 5u 2 5u 125 0 8 Free Air Operating Temperature Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted) Symbol VI VOH VOL Parameter Input Clamp Voltage High Level Output Voltage Low Level Output Voltage Conditions VCC e Min II e b18 mA VCC e Min IOH e Max VIL e Max VIH e Min VCC e Min IOL e Max VIL e Max VIH e Min IOL e 4 mA VCC e Min II IIH IIL Input Current Input Voltage Max VCC e Max VI e 7V VI e 10V VCC e Max VI e 2 7V VCC e Max VI e 0 4V VCC e Max VI e 0 4V VCC e Max (Note 5) VCC e Max (Note 6) DM54 DM74 b 20 b 20 Min Typ (Note 4) Max b1 5 Units V V DM54 DM74 DM54 DM74 DM74 DM74 DM54 25 27 34 04 0 35 0 25 05 04 01 20 b0 4 b0 8 b 100 b 100 V mA mA High Level Input Current Low Level Input Current Enable Short Circuit Output Current Supply Current mA IOS ICC mA mA 22 36 Note 1 The symbols ( v u) indicate the edge of the clock pulse used for reference u for rising edge v for falling edge Note 2 Setup and hold times are with reference to the enable input Note 3 The select-to-enable setup time is the time before the High-to-Low enable transition that the select must be stable so that the correct l.


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