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DM54LS138 Dataheets PDF



Part Number DM54LS138
Manufacturers National Semiconductor
Logo National Semiconductor
Description Decoders/Demultiplexers
Datasheet DM54LS138 DatasheetDM54LS138 Datasheet (PDF)

54LS138 DM54LS138 DM74LS138 54LS139 DM54LS139 DM74LS139 Decoders Demultiplexers June 1989 54LS138 DM54LS138 DM74LS138 54LS139 DM54LS139 DM74LS139 Decoders Demultiplexers General Description These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing applications requiring very short propagation delay times In high-performance memory systems these decoders can be used to minimize the effects of system decoding When used with high-speed memories th.

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54LS138 DM54LS138 DM74LS138 54LS139 DM54LS139 DM74LS139 Decoders Demultiplexers June 1989 54LS138 DM54LS138 DM74LS138 54LS139 DM54LS139 DM74LS139 Decoders Demultiplexers General Description These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing applications requiring very short propagation delay times In high-performance memory systems these decoders can be used to minimize the effects of system decoding When used with high-speed memories the delay times of these decoders are usually less than the typical access time of the memory This means that the effective system delay introduced by the decoder is negligible The LS138 decodes one-of-eight lines based upon the conditions at the three binary select inputs and the three enable inputs Two active-low and one active-high enable inputs reduce the need for external gates or inverters when expanding A 24-line decoder can be implemented with no external inverters and a 32-line decoder requires only one inverter An enable input can be used as a data input for demultiplexing applications The LS139 comprises two separate two-line-to-four-line decoders in a single package The active-low enable input can be used as a data line in demultiplexing applications All of these decoders demultiplexers feature fully buffered inputs presenting only one normalized load to its driving circuit All inputs are clamped with high-performance Schottky diodes to suppress line-ringing and simplify system design Features Y Y Y Y Y Y Y Designed specifically for high speed Memory decoders Data transmission systems LS138 3-to-8-line decoders incorporates 3 enable inputs to simplify cascading and or data reception LS139 contains two fully independent 2-to-4-line decoders demultiplexers Schottky clamped for high performance Typical propagation delay (3 levels of logic) LS138 21 ns LS139 21 ns Typical power dissipation LS138 32 mW LS139 34 mW Alternate Military Aerospace devices (54LS138 54LS139) are available Contact a National Semiconductor Sales Office Distributor for specifications Connection Diagrams Dual-in-Line Package Dual-in-Line Package TL F 6391 – 1 TL F 6391 – 2 Order Number 54LS138DMQB 54LS138FMQB 54LS138LMQB DM54LS138J DM54LS138W DM74LS138M or DM74LS138N See NS Package Number E20A J16A M16A N16E or W16A C1995 National Semiconductor Corporation TL F 6391 Order Number 54LS139DMQB 54LS139FMQB 54LS139LMQB DM54LS139J DM54LS139W DM74LS139M or DM74LS139N See NS Package Number E20A J16A M16A N16E or W16A RRD-B30M105 Printed in U S A Absolute Maximum Ratings (Note) If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Supply Voltage 7V Input Voltage 7V Operating Free Air Temperature Range b 55 C to a 125 C DM54LS and 54LS DM74LS 0 C to a 70 C Storage Temperature Range b 65 C to a 150 C Note The ‘‘Absolute Maximum Ratings’’ are those values beyond which the saf.


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