54LS125A DM54LS125A DM74LS125A Quad TRI-STATE Buffers
June 1989
54LS125A DM54LS125A DM74LS125A Quad TRI-STATE Buffers
...
54LS125A DM54LS125A DM74LS125A Quad TRI-STATE Buffers
June 1989
54LS125A DM54LS125A DM74LS125A Quad TRI-STATE Buffers
General Description
This device contains four independent gates each of which performs a non-inverting buffer function The outputs have the TRI-STATE feature When enabled the outputs exhibit the low impedance characteristics of a standard LS output with additional drive capability to permit the driving of bus lines without external resistors When disabled both the output
transistors are turned off presenting a high-impedance state to the bus line Thus the output will act neither as a significant load nor as a driver To minimize the possibility that two outputs will attempt to take a common bus to opposite logic levels the disable time is shorter than the enable time of the outputs
Features
Y
Alternate Military Aerospace device (54LS125) is available Contact a National Semiconductor Sales Office Distributor for specifications
Connection Diagram
Dual-In-Line Package
TL F 6387 – 1
Order Number 54LS125ADMQB 54LS125AFMQB 54LS125ALMQB DM54LS125AJ DM54LS125AW DM74LS125AM or DM74LS125AN See NS Package Number E20A J14A M14A N14A or W14B
Function Table
YeA Inputs A L H X
H e High Logic Level L e Low Logic Level X e Either Low or High Logic Level Hi-Z e TRI-STATE (Outputs are disabled)
Output C L L H Y L H Hi-Z
TRI-STATE is a registered trademark of National Semiconductor Corporation C1995 National Semiconductor Corporation
TL F 6387
RRD-B30M105 Printed in U ...