DM54L93

DM54L93 Decade Divide-by-12 and Binary Counters June 1989 DM54L93 Decade Divide-by-12 and Binary Counters General Description Each of these monolithic counters contains four masterslave flip-flops and additional gating to provide a divide-bytwo counter and a three-stage binary counter for which the count cycle length is divide-by-eight To use their maximum count length (decade divide-bytwelve or four-bit binary) the B input is connected to the QA output The input count pulses are applied to input A and the outputs are as described in the appropriate truth table Features Y Y Typical power dissipation 16 mW Count frequency 15 MHz Connection Diagram Dual-In-Line Package Function Tables COUNT SEQUENCE (See Note A) Count QD 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 L L L L L L L L H H H H H H H H Output QC L L L L H H H H L L L L H H H H QB L L H H L L H H L L H H L L H H QA L H L H L H L H L H L H L H L H TL F 6637 – 1 Order Number DM54L93J or DM54L93W See NS Package Number J14A or W14B RESET COUNT TRUTH TABLE (Note B) Reset Inputs R0(1) H L X R0(2) H X L QD L Output QC QB QA L L L COUNT COUNT Note A Output QA is connected to input B Note B H e High Level L e Low Level X e Don’t Care C1995 National Semiconductor Corporation TL F 6637 RRD-B30M105 Printed in U S A Absolute Maximum Ratings (Note) If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Supply Voltage 8V Inp...