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FOD2200S Dataheets PDF



Part Number FOD2200S
Manufacturers Fairchild Semiconductor
Logo Fairchild Semiconductor
Description LOW INPUT CURRENT LOGIC GATE OPTOCOUPLERS
Datasheet FOD2200S DatasheetFOD2200S Datasheet (PDF)

LOW INPUT CURRENT LOGIC GATE OPTOCOUPLERS FOD2200 DESCRIPTION The FOD2200 is an optically coupled logic gate that combine an AlGaAs LED and an integrated high gain photo detector. The detector has a three state output stage and has a detector threshold with hysteresis. The three state output eliminates the need for a pullup resistor and allows for direct drive of data busses. The hysteresis provides differential mode noise immunity and eliminates the potential for output signal chatter. The Elec.

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LOW INPUT CURRENT LOGIC GATE OPTOCOUPLERS FOD2200 DESCRIPTION The FOD2200 is an optically coupled logic gate that combine an AlGaAs LED and an integrated high gain photo detector. The detector has a three state output stage and has a detector threshold with hysteresis. The three state output eliminates the need for a pullup resistor and allows for direct drive of data busses. The hysteresis provides differential mode noise immunity and eliminates the potential for output signal chatter. The Electrical and Switching Characteristics of the FOD2200 are guaranteed over the temperature range of 0°C to 85°C and a VCC range of 4.5 volts to 20 volts. Low IF and wide VCC range allow compatibility with TTL, LSTTL, and CMOS logic and result in lower power consumption compared to other high speed optocouplers. Logic signals are transmitted with a maximum propagation delay of 300 nsec. The FOD2200 is useful for isolating high speed logic interfaces, buffering of input and output lines, and implementing isolated line receivers in high noise environments. 8 1 8 1 8 1 FEATURES • 1 kV/µs Minimum Common Mode Rejection • Compatible with LSTTL, TTL, and CMOS Logic • Wide VCC Range (4.5 to 20 V) • 2.5 Mbd Guaranteed over Temperature • Low Input Current (1.6 mA) • Three State Output (No Pullup Resistor Required) • Guaranteed Performance from 0°C to 85°C • Hysteresis • Safety Approvals Pending – UL, CSA, VDE • VISO = 5kVRMS APPLICATION • • • • • • • Isolation of High Speed Logic Systems Computer-Peripheral Interfaces Microprocessor System Interfaces Ground Loop Elimination Pulse Transformer Replacement Isolated Buss Driver High Speed Line Receiver NC 1 ANODE 2 CATHODE 3 NC 4 8 VCC 7 VO 6 VE 5 GND SHIELD Schematic ICC 8 IF + VF – 2 IE 3 SHIELD 6 5 IO 7 VCC VO VE GND TRUTH TABLE (Positive Logic) LED On Off On Off Enable H H L L Output Z Z H L © 2004 Fairchild Semiconductor Corporation Page 1 of 14 7/7/04 LOW INPUT CURRENT LOGIC GATE OPTOCOUPLERS FOD2200 ABSOLUTE MAXIMUM RATINGS (TA = 25°C unless otherwise specified) Parameter Storage Temperature Operating Temperature Lead Solder Temperature (1.6mm below seating plane) EMITTER Peak Transient Input Current (≤1µs PW, 300 pps) Average Forward Input Current Reverse Input Voltage Output Power Dissipation (No derating required up to 85°C) DETECTOR Supply Voltage Average Output Current Three State Enable Voltage Output Voltage Output Power Dissipation (No derating required up to 85°C) VCC IO VE VO PD 0 to 20 25 -0.5 to 20 -0.5 to 20 150 V mA V V mW IF (PK) IF VR PD 1.0 10 5.0 45 A mA V mW Symbol TSTG TOPR TSOL Value -40 to +125 -40 to +85 260 for 10 sec Units °C °C °C RECOMMENDED OPERATING CONDITIONS Parameter Forward Input Current Forward Input Current Supply Voltage, Output Enable Voltage, Low Level Enable Voltage, High Level Operating Temperature Fan Out (TTL load) Symbol IF(ON) IF(OFF) VCC VEL VEH TA N 4.5 0 2.0 0 Min 1.6* Max 5 0.1 20 0.8 20 +85 4 Units mA mA V V V °C *The initial switching threshold is 1.6mA or less. It is recommended that 2.2 mA be used to permit at least a 20% CTR degradation guardband. © 2004 Fairchild Semiconductor Corporation Page 2 of 14 7/7/04 LOW INPUT CURRENT LOGIC GATE OPTOCOUPLERS FOD2200 ELECTRICAL CHARACTERISTICS (TA = 0°C to +85°C, VCC = 4.5V to 20V, IF(ON) = 1.6mA to 5mA, VEH = 2V to 20V, VEL = 0V to 0.8V, IF(OFF) = 0 mA to 0.1 mA Unless otherwise specified.) See Note 1. INDIVIDUAL COMPONENT CHARACTERISTICS Parameter EMITTER Input Forward Voltage Input Reverse Breakdown Voltage Input Capacitance Input Diode Temperature Coefficient DETECTOR High Level Supply Current Low Level Supply Current Low Level Enable Current High Level Enable Current High Level Enable Voltage Low Level Enable Voltage Test Conditions Symbol Min Typ** 1.40 5.0 60 -1.4 3.5 4.0 4.4 5.2 -0.1 4.5 6.0 6.0 7.5 -0.32 20 100 250 0.8 Max 1.75 1.7 Unit V V pF mV/°C (IF = 5 mA) VF TA =25°C (IR = 10 µA) BVR (Pins 2 & 3) (VF = 0, f = 1 MHz) CIN (IF = 5 mA) ∆VF/∆TA (IF = 5 mA) VCC = 5.5V (IO = Open, VE = Don’t care) VCC = 20V (IF = 0 ) VCC = 5.5V (IO = Open, VE = Don’t care) VCC = 20V VE = 0.4 V VE = 2.7 V VE = 5.5 V VE = 20 V ICCH ICCL IEL IEH 0.005 VEH VEL 2.0 mA mA mA µA V V SWITCHING CHARACTERISTICS (TA = 0°C to +85°C, IF(ON) = 1.6mA to 5mA, IF(OFF) = 0 to 0.1 mA, VCC = 4.5 to 20V Unless otherwise specified.) AC Characteristics Propagation Delay Time to Output High Level Propagation Delay Time to Output Low Level Test Conditions Symbol (Note 2, 4) (Fig. 1) With Peaking Capacitor (Note 3, 4) (Fig. 1) With Peaking Capacitor (Note 5) (Fig. 1) (Note 6) (Fig. 1) TPLH TPHL tr tf tPZH tPZL TPHZ TPLZ |CMH| 1000 Min Typ** 120 180 80 25 40 50 95 80 Max 300 300 Unit ns ns ns ns ns ns ns ns V/µs Output Rise Time (10-90%) Output Fall Time (90-10%) Enable Propagation Delay Time (Fig. 2) to Output High Level Enable Propagation Delay Time (Fig. 2) to Output Low Level Disable Propagation Delay Time from Output High Level (Fig. 2) Disable Propagation Delay Time from Output Low Level (Fig. 2.


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