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FMS7401/7401L
Digital Power Controller
General Description
The FMS7401/7401L is a family of Digital Power Controllers designed for applications requiring ease of digital based control over analog based implementations. The FMS7401/ 7401L family is an ideal solution to implement ballast control, motor control and battery management functions. This family integrates a wide variety of analog blocks with an 8-bit microcontroller core to offer a complementary feature set with high performance, low power and small size in a single chip. The FMS7401/7401L family is fabricated using CMOS technology and is fully static. This offers significant power savings. This family is available in both 8-pin and 14-pin PDIP packages. SOIC and TSSOP packages are available upon request. The FMS7401L is intended for applications using a supply voltage in the 2.7V to 3.6V range, while the FMS7401 is suited for applications that use a supply voltage in the 10V to 13.5V range. • 5-Ch 8-bit Analog-to-Digital Converter – 20 µS conversion time – Sample and Hold – Internal Voltage Reference (1.21V) – Gated Auto-sampling Mode • Auto-zero Amplifier (gain 16) • Uncommitted Amplifier • Internal Current Source Generator (1mA) • On-chip Oscillator – No external components – 1µs instruction cycle time • On-chip Power-on Reset • Programmable read and write disable functions • Memory Mapped I/O • Programmable Comparator (63 Levels) • Brown-out Reset • Software selectable I/O option • Push-pull outputs with tri-state option • Weak pull-up or high impedance inputs • Fully static CMOS – Power Saving Halt Mode – FMS7401L (< 1.3µA @ 3.3V) – Power Saving Idle Mode – FMS7401L (< 180µA @ 3.3V) • Single supply operation – 10V – 13.5V (FMS7401)* – 2.7V – 3.6V (FMS7401L) • 40 years data retention • 100,000 data changes • 8-/14-pin PDIP, SOIC, and TSSOP packages • In-circuit programming – Fast Page-write Programming Mode
Features
• • • • • • • 8-bit Microcontroller Core 1K bytes on-board code EEPROM 64 bytes data EEPROM 64 bytes SRAM Watchdog Reset Multi-input Wakeup on all general purpose I/O pins Fast 12-bit PWM timer with dead time control and halfbridge output drive – Input Capture Mode
Device FMS7401L FMS7401L FMS7401*
Supply Voltage 2.7V – 3.6V 2.7V – 3.6V 10V – 13.5V
Program Memory (bytes) 1K 1K 1K
Data Memory (bytes) SRAM 64 64 64 Data EEPROM 64 64 64 I/O 6 8 8 Pin Count 8 14 14
* Contact your local Fairchild Sales Representative for FMS7401 availability.
REV. 1.0.2 6/23/04
FMS7401/7401L
Block Diagram
Vcc Vdd GND RESET
FMS7401 only
G7/AIN4/ AOUT G6/-AIN Vcc
Uncommitted Amplifier _ AOUT
3.3V Regulator
VREF
+
ACH5
Analog Mux Power-on Reset and Brown-out Reset S/H 8-bit ADC Timer 0 and Watchdog 64bytes Data EEPROM Memory 64 bytes SRAM
Programmable Comparator + _
G3/AIN1 G2/AIN2 G1/AIN3/ ADSTROBE
ACH2
Internal Oscillator
ACH3 Y
ACH4 ACH1
G0/T1HS1
SR_GND G4/AIN0
_ +
Autozero Amplifier x16
8-bit Microcontroller Core
PWM TIMER 1 and Dead Time Control
G5/T1HS2
Unit Gain
1024 bytes Code EEPROM Memory
I/O PORTS
AGND
AOUT
Progr. Reference
Digital Filter
Figure 1. FMS7401/7401L Block and Connection Diagram
Pin Configurations
G4/AIN0 GND G2/AIN2 G1/AIN3
1 2 3 4
8 7 6 5
VCC G5/T1HS2 G0/T1HS1 G3/AIN1
G5/T1HS2 VCC G4/AIN0 GND
1 2 3 4
8 7 6 5
G0/T1HS1 G3/AIN1 G1/AIN3 G2/AIN2
FMS7401L 8-Pin PDIP/SOIC
FMS7401L 8-Pin TSSOP
G4/AIN0 SR_GND GND G6/-AIN G7/AOUT G2/AIN2 G1/AIN3
1 2 3 4 5 6 7
14 13 12 11 10 9 8
VCC VDD G5/T1HS2 RESET G0/T1HS1 G3/AIN1 AGND
FMS7401/7401L 14-Pin PDIP/SOIC/TSSOP
2
REV. 1.0.2 6/23/04
PRODUCT SPECIFICATION
FMS7401/7401L
FMS7401/7401L Pin Definitions
Pin Number 8-Pin PDIP SOIC 1 14-Pin PDIP SOIC TSSOP 1
TSSOP 3
Pin Name G4/AIN0
Pin Function Description General purpose I/O port (bit 4 of the I/O configuration registers). AIN0 analog input of the ADC (autozero amplifier’s positive terminal). Programmable Comparator non-inverting input, if COMPSEL=0.
2 3
4 5
3 6
GND G2/AIN2
Digital ground pin. General purpose I/O port (bit 2 of the I/O configuration registers). AIN2 analog input of the ADC. Programmable Comparator non-inverting input, if COMPSEL=1.
4
6
7
G1/AIN3/ ADSTROBE
General purpose I/O port (bit 1 of the I/O configuration registers). AIN3 analog input of the ADC. External digital clock input. PWM Timer 1’s ADSTROBE output.
5
7
9
G3/AIN1
General purpose I/O port (bit 3 of the I/O configuration registers). AIN1 analog input of the ADC. Internal current source generator pin.
6
8
10
G0/ T1HS1 G5/ T1HS2 VCC SR_GND G6/-AIN
General purpose I/O port (bit 0 of the I/O configuration registers). PWM Timer 1’s T1HS1 output. General purpose I/O port (bit 5 of the I/O configuration registers). PWM Timer 1’s T1HS2 output. Supply voltage input for the FMS7401L. In the FMS7401, Vcc is the regulated output. AIN0 analog input of the ADC (autozero amplifier’s negative terminal). SR_GND is internally connected to GND in the 8-pin FMS7401L. General purpose I/O port (bit 6.