A
PLUS MAKE YOUR PRODUCTION A-PLUS
AVXX32E-B SERIES DATA SHEET
APLUS
INTEGRATED CIRCUITS INC.
Sales E-mail:
[email protected] Technology E-mail:
[email protected]
Address: 3 F-10, No. 32, Sec. 1, Chenggung Rd., Taipei, Taiwan 115, R.O.C. (115)㆒ 32 3 10. TEL: 886-2-2782-9266 FAX: 886-2-2782-9255 WEBSITE : http: //www.aplusinc.com.tw
21, 32, 43, 65 and 87 Seconds Complicate Pure Speech
Features
y Operating voltage: 2.4V~5.0V y One single-key can implement play-all, play-next and random function. Maximum play count is 32. y 4-column inputs and 3-row outputs can implement 4x4-matrix function. y Each input can implement looping function. y Single-key and 4-column inputs can be last-key priority for stand-alone input or first-key priority. y Each input trigger can select trigger mode: (For OKY, TG0, TG1, TG2, TG3) Edge/Level, Hold/Unhold, Retrigger/Irretrigger. y Each input trigger can select its own debounce time: Fast debounce: < 200us; Slow debounce: ~16ms (S.R.=6.0kHz) y Support bouncing trigger solution for retrigger application. (Second trigger force to retrigger and slow debounce.) y Maximum table entries are 460*8. y Word count is only limited by ROM capacity. y 4 output ports for Status or Led application: Ϋʳ OP_A Status: Busy_high ,DC_low, Stop_high,DC_high LED: +Fast,+Slow, Dyn(7/10), Off Ϋʳ OP_B Status: Busy_high, DC_low, Stop_high, DC_high LED: -Fast, -Slow, Dyn(9/10), On Ϋʳ OP_C Status: Busy_high, DC_low, Busy_low, DC_high LED: +Fast, +Slow, On, Off OP_D Status0: Busy_high, DC_low Status1: Busy_low, DC_high y Each output can specify its initial state (High or Low) y Outputs can be set as constant current regardless of the supply voltage varied. y Two PWM playing ports. Drive speaker or buzzer directly (For tone only). y One DAC playing port, together with external bipolar to drive speaker. Ramp up/down is automatic. y For DAC, AVXX32E-B series supports 8 levels of current control to offer flexible choises of corresponding BJT. y Four-level volume control is provided for DAC or PWM output. y Eight-pitch control is provided. y Voice length: 21, 32, 43, 65 and 87 seconds. (ROM capacity : 131072*5, 196608*5, 262144*5, 393216*5 and 524288*5 bits) y Voice algorithm: 5-bits LOG_PCM y External resister or built-in resister for system frequency by bonding option on the same pad. y Sixteen default sampling frequencies are supported. The default frequencies can be changed by an external applying resistor. y Support single key play on/off. (For OKY, TG0, TG1) y Programmable pull-high, pull-low or floating input. (For OKY, TG0, TG1)
Ϋʳ
AVXX32E-B SERIES
General Description
The AVXX32E-B is a series of single-chip synthesizing CMOS VLSI which synthesizes voice by LOG_PCM algorithm. Table programming and shared multiple I/O pins make the applications flexible. Powerful functions and pure speech architecture make the AVXX32E-B series able to best fit most speech applications and a best cost/performance ratio as a result. The programming of the AVXX32E-B series is first to define words. Each word contains voice data (or mute length), output method, pitch (if pitch control enabled), and volume (if volume control enabled). Assemble the words into sentences first, and then the programmer can assign the sentences to the keys corresponding to the user inputs. The I/O pins of the AVXX32E-B series are multiplexed. This means the users have flexible I/O options for their applications in a minimum number of pin counts, that is, lower cost. The users can use maximum 4*4 matrix plus one single-key inputs, but less outputs; or 4 maximum outputs, but less inputs. The AVXX32E-B series support DAC or PWM audio output, the users can select both if necessary. The frequency stability in the AVXX32E-B series is outstanding. The frequency variation by voltage change is relatively small compared to the competitor. Furthermore, volume option offers users flexible selection for their applications. In addition, the AVXX32E-B series support current control for DAC output. Thus users can choose suitable current output for their BJT component. The programming and the approval can be done in the EV chip of the AVXX32E-B series. It makes the programming and verification easy. Please contact APLUS sales for the EV chip if required. 10-1 Ver. 1.0
AVXX32E-B SERIES
Pin Description
Pin Name VDD TEST OSC OKY_RW3 TG0,TG1 TG2_OPD TG3_OPC RW1_OPB RW2_OPA PWM1 PWM2 I/O Power In In In Out In In Out In Out Out Out Out Out Out Out Out Out Out DAC Out Power OKY ROW3 TG2 OP_D TG3 OP_C ROW1 OP_B ROW2 OP_A PWM1 OP_A OP_C PWM2 OP_B OP_D DAC OP_A OP_B OP_C OP_D Pad Assign Description Positive power supply Test enable pad, high-active, pull-low With resister connected to VDD for system clock generating or connected to VSS using internal resister Trigger input, active-high Row output for matrix function. Column input or stand-alone input; active-high Column input or stand-alone input; active-high Status output Column inpu.