Features
Utilizes the AVR® RISC Architecture AVR – High-performance and Low-power RISC Architecture
– 121 Powerful Instructions – Most Single Clock Cycle Execution – 32 x 8 General Purpose Working Registers + Peripheral Control Registers – Up to 6 MIPS Throughput at 6 MHz Data and Nonvolatile Program Memory – 128K Bytes of In-System Programmable Flash
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