FAN1655

www.fairchildsemi.com FAN1655 3A DDR Bus Termination Regulator Features Sinks and sources 2.1A continuous, 3A peak 0 to +125°C operating temperature range 5mA Buffered VREFOUT = VDDQ/2 Load regulation: VTT = VREFOUT ± 40mV On-chip thermal limiting Low Cost SO-14, Power Enhanced eTSSOP or 8-pin 5x6mm MLP packages Low-Current Shutdown Mode Output Short Circuit Protection Description The FAN1655 is a low-cost bi-directional LDO specifically designed for terminating DDR memory bus. It can both sink and source up to 2.1A continuous, 3A peak, providing enough current for most DDR applications. Load regulation meets the JEDEC spec, VTT = VREFOUT ± 40mV. The FAN1655 includes a buffered reference voltage capable of supplying up to 5mA current. On-chip thermal limiting provides protection against a combination of power overload and ambient temperature that would create an excessive junction temperature. A shutdown input puts the FAN1655 into a low power mode. The FAN1655 regulator is available in a power-enhanced eTSSOP™-16 package, and the standard SOIC-14 Applications DDR Terminator VTT supply Block Diagram VDDQ 200k VREFOUT VREFIN + VTTFORCE + VTTFORCE 200k VTTSENSE FAN1655 VSSQ VSS VSS VSS VDD VDD VDD SHDN REV. 1.1.3 2/20/03 PRODUCT SPECIFICATION FAN1655 Pin Assignments VDD VDD VTTFORCE VSS VSS VTTFORCE VDD VSS 1 2 3 4 5 6 7 8 FAN1655 16 15 14 13 12 11 10 9 NC VDDQ VREFOUT VSSQ SHDN VREFIN VTTSENSE NC VDD VDD VTTFORCE VSS VSS VTTFORCE VDD 1 2 3 4 5 6 7 FAN...