Dual N & P-Channel Enhancement Mode Field Effect Transistor
These dual N- and P -Channel enhancement mode power
field effect transistors are produced using Fairchild's
proprietary, high cell density, DMOS technology. This very
high density process is especially tailored to minimize
on-state resistance and provide superior switching
performance. These devices are particularly suited for low
voltage applications such as notebook computer power
management and other battery powered circuits where fast
switching, low in-line power loss, and resistance to
transients are needed.
N-Channel 5.5 A,30 V, RDS(ON)=0.030 Ω @ VGS=4.5 V
RDS(ON)=0.038 Ω @ VGS=2.5 V.
P-Channel -4 A,-20 V, RDS(ON)=0.055 Ω @ VGS=-4.5 V
RDS(ON)=0.072 Ω @ VGS=-2.5 V.
High density cell design for extremely low RDS(ON).
High power and current handling capability in a widely used
surface mount package.
Dual (N & P-Channel) MOSFET in surface mount package.
Absolute Maximum Ratings TA = 25°C unless otherwise noted
VDSS Drain-Source Voltage
VGSS Gate-Source Voltage
ID Drain Current - Continuous
PD Power Dissipation for Dual Operation
Power Dissipation for Single Operation (Note 1a)
TJ,TSTG Operating and Storage Temperature Range
Thermal Resistance, Junction-to-Ambient (Note 1a)
Thermal Resistance, Junction-to-Case (Note 1)
© 1998 Fairchild Semiconductor Corporation
-55 to 150
FDS8928A Rev. B