FDC633N

March 1998 FDC633N N-Channel Enhancement Mode Field Effect Transistor General Description This N-Channel enhancement mode power field effect transistors is produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is tailored to minimize on-state resistance. These devices are particularly suited for low voltage applications in notebook computers, portable phones, PCMICA cards, and other battery powered circuits where fast switching,low in-line power loss and resistance to transients are needed in a very small outline surface mount package. Features 5.2 A, 30 V. RDS(ON) = 0.042 Ω @ VGS = 4.5 V RDS(ON) = 0.054 Ω @ VGS = 2.5 V. SuperSOTTM-6 package design using copper lead frame for superior thermal and electrical capabilities. High density cell design for extremely low RDS(ON). Exceptional on-resistance and maximum DC current capability. SOT-23 SuperSOTTM-6 SuperSOTTM-8 SO-8 SOT-223 SOIC-16 S D D 1 6 .63 3 2 5 G SuperSOT TM pin 1 D D 3 4 -6 Absolute Maximum Ratings T A = 25°C unless otherwise noted Symbol Parameter VDSS VGSS ID PD Drain-Source Voltage Gate-Source Voltage - Continuous Drain Current - Continuous - Pulsed Maximum Power Dissipation (Note 1a) (Note 1b) (Note 1a) FDC633N 30 ±8 5.2 16 1.6 0.8 -55 to 150 Units V V A W TJ,TSTG RθJA RθJC Operating and Storage Temperature Range °C THERMAL CHARACTERISTICS Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case (Note 1a) (Note 1) ...